Changes in kernel/arch/amd64/include/mm/page.h [7a0359b:d99c1d2] in mainline
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kernel/arch/amd64/include/mm/page.h
r7a0359b rd99c1d2 35 35 /** Paging on AMD64 36 36 * 37 * The space is divided in positive numbers (uspace) and 38 * negative numbers (kernel). The 'negative' space starting 39 * with 0xffff800000000000 and ending with 0xffffffffffffffff 40 * is identically mapped physical memory. 41 * 37 * The space is divided in positive numbers - userspace and 38 * negative numbers - kernel space. The 'negative' space starting 39 * with 0xffff800000000000 and ending with 0xffffffff80000000 40 * (-2GB) is identically mapped physical memory. The area 41 * (0xffffffff80000000 ... 0xffffffffffffffff is again identically 42 * mapped first 2GB. 43 * 44 * ATTENTION - PA2KA(KA2PA(x)) != x if 'x' is in kernel 42 45 */ 43 46 … … 46 49 47 50 #include <arch/mm/frame.h> 48 #include <trace.h> 49 50 #define PAGE_WIDTH FRAME_WIDTH 51 #define PAGE_SIZE FRAME_SIZE 51 52 #define PAGE_WIDTH FRAME_WIDTH 53 #define PAGE_SIZE FRAME_SIZE 52 54 53 55 #ifdef KERNEL 54 56 55 57 #ifndef __ASM__ 56 57 #define KA2PA(x) (((uintptr_t) (x)) - 0xffff800000000000) 58 #define PA2KA(x) (((uintptr_t) (x)) + 0xffff800000000000) 59 60 #else /* __ASM__ */ 61 62 #define KA2PA(x) ((x) - 0xffff800000000000) 63 #define PA2KA(x) ((x) + 0xffff800000000000) 64 65 #endif /* __ASM__ */ 58 # include <mm/mm.h> 59 # include <typedefs.h> 60 # include <arch/interrupt.h> 61 62 static inline uintptr_t ka2pa(uintptr_t x) 63 { 64 if (x > 0xffffffff80000000) 65 return x - 0xffffffff80000000; 66 else 67 return x - 0xffff800000000000; 68 } 69 70 # define KA2PA(x) ka2pa((uintptr_t) x) 71 # define PA2KA_CODE(x) (((uintptr_t) (x)) + 0xffffffff80000000) 72 # define PA2KA(x) (((uintptr_t) (x)) + 0xffff800000000000) 73 #else 74 # define KA2PA(x) ((x) - 0xffffffff80000000) 75 # define PA2KA(x) ((x) + 0xffffffff80000000) 76 #endif 66 77 67 78 /* Number of entries in each level. */ 68 #define PTL0_ENTRIES_ARCH 69 #define PTL1_ENTRIES_ARCH 70 #define PTL2_ENTRIES_ARCH 71 #define PTL3_ENTRIES_ARCH 79 #define PTL0_ENTRIES_ARCH 512 80 #define PTL1_ENTRIES_ARCH 512 81 #define PTL2_ENTRIES_ARCH 512 82 #define PTL3_ENTRIES_ARCH 512 72 83 73 84 /* Page table sizes for each level. */ 74 #define PTL0_SIZE_ARCH 75 #define PTL1_SIZE_ARCH 76 #define PTL2_SIZE_ARCH 77 #define PTL3_SIZE_ARCH 85 #define PTL0_SIZE_ARCH ONE_FRAME 86 #define PTL1_SIZE_ARCH ONE_FRAME 87 #define PTL2_SIZE_ARCH ONE_FRAME 88 #define PTL3_SIZE_ARCH ONE_FRAME 78 89 79 90 /* Macros calculating indices into page tables in each level. */ 80 #define PTL0_INDEX_ARCH(vaddr) 81 #define PTL1_INDEX_ARCH(vaddr) 82 #define PTL2_INDEX_ARCH(vaddr) 83 #define PTL3_INDEX_ARCH(vaddr) 91 #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 39) & 0x1ff) 92 #define PTL1_INDEX_ARCH(vaddr) (((vaddr) >> 30) & 0x1ff) 93 #define PTL2_INDEX_ARCH(vaddr) (((vaddr) >> 21) & 0x1ff) 94 #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x1ff) 84 95 85 96 /* Get PTE address accessors for each level. */ … … 145 156 #ifndef __ASM__ 146 157 147 #include <mm/mm.h>148 #include <arch/interrupt.h>149 #include <typedefs.h>150 151 158 /* Page fault error codes. */ 152 159 … … 154 161 * page. 155 162 */ 156 #define PFERR_CODE_P (1 << 0)163 #define PFERR_CODE_P (1 << 0) 157 164 158 165 /** When bit on this position is 1, the page fault was caused by a write. */ 159 #define PFERR_CODE_RW (1 << 1)166 #define PFERR_CODE_RW (1 << 1) 160 167 161 168 /** When bit on this position is 1, the page fault was caused in user mode. */ 162 #define PFERR_CODE_US (1 << 2)169 #define PFERR_CODE_US (1 << 2) 163 170 164 171 /** When bit on this position is 1, a reserved bit was set in page directory. */ 165 #define PFERR_CODE_RSVD (1 << 3)172 #define PFERR_CODE_RSVD (1 << 3) 166 173 167 174 /** When bit on this position os 1, the page fault was caused during instruction 168 175 * fecth. 169 176 */ 170 #define PFERR_CODE_ID 177 #define PFERR_CODE_ID (1 << 4) 171 178 172 179 /** Page Table Entry. */ 173 180 typedef struct { 174 unsigned intpresent : 1;175 unsigned intwriteable : 1;176 unsigned intuaccessible : 1;177 unsigned intpage_write_through : 1;178 unsigned intpage_cache_disable : 1;179 unsigned intaccessed : 1;180 unsigned intdirty : 1;181 unsigned intunused: 1;182 unsigned intglobal : 1;183 unsigned int soft_valid : 1;/**< Valid content even if present bit is cleared. */184 unsigned intavl : 2;185 unsigned intaddr_12_31 : 30;186 unsigned intaddr_32_51 : 21;187 unsigned intno_execute : 1;181 unsigned present : 1; 182 unsigned writeable : 1; 183 unsigned uaccessible : 1; 184 unsigned page_write_through : 1; 185 unsigned page_cache_disable : 1; 186 unsigned accessed : 1; 187 unsigned dirty : 1; 188 unsigned unused: 1; 189 unsigned global : 1; 190 unsigned soft_valid : 1; /**< Valid content even if present bit is cleared. */ 191 unsigned avl : 2; 192 unsigned addr_12_31 : 30; 193 unsigned addr_32_51 : 21; 194 unsigned no_execute : 1; 188 195 } __attribute__ ((packed)) pte_t; 189 196 190 NO_TRACEstatic inline unsigned int get_pt_flags(pte_t *pt, size_t i)197 static inline unsigned int get_pt_flags(pte_t *pt, size_t i) 191 198 { 192 199 pte_t *p = &pt[i]; … … 201 208 } 202 209 203 NO_TRACEstatic inline void set_pt_addr(pte_t *pt, size_t i, uintptr_t a)210 static inline void set_pt_addr(pte_t *pt, size_t i, uintptr_t a) 204 211 { 205 212 pte_t *p = &pt[i]; 206 213 207 214 p->addr_12_31 = (a >> 12) & 0xfffff; 208 215 p->addr_32_51 = a >> 32; 209 216 } 210 217 211 NO_TRACEstatic inline void set_pt_flags(pte_t *pt, size_t i, int flags)218 static inline void set_pt_flags(pte_t *pt, size_t i, int flags) 212 219 { 213 220 pte_t *p = &pt[i]; … … 227 234 228 235 extern void page_arch_init(void); 229 extern void page_fault( unsigned int, istate_t *);236 extern void page_fault(int n, istate_t *istate); 230 237 231 238 #endif /* __ASM__ */
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