Changes in kernel/arch/ia32/src/pm.c [ff586e06:d99c1d2] in mainline

File:

• kernel/arch/ia32/src/pm.c (modified) (4 diffs)

kernel/arch/ia32/src/pm.c

@@ -75 +75 @@
         /* VESA Init descriptor */
 #ifdef CONFIG_FB
-        { 0xffff, 0, VESA_INIT_SEGMENT >> 12, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 0, 0, 0 }
-#endif
+        { 0xffff, 0, VESA_INIT_SEGMENT>>12, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 0, 0, 0 }
+#endif  
 };
 
@@ -86 +86 @@
 
 /* gdtr is changed by kmp before next CPU is initialized */
-ptr_16_32_t gdtr = {
-        .limit = sizeof(gdt),
-        .base = (uintptr_t) gdt
-};
+ptr_16_32_t bootstrap_gdtr = { .limit = sizeof(gdt), .base = KA2PA((uintptr_t) gdt) };
+ptr_16_32_t gdtr = { .limit = sizeof(gdt), .base = (uintptr_t) gdt };
 
 void gdt_setbase(descriptor_t *d, uintptr_t base)
@@ -130 +128 @@
 
                 d->unused = 0;
-                d->selector = GDT_SELECTOR(KTEXT_DES);
+                d->selector = gdtselector(KTEXT_DES);
+
+                d->access = AR_PRESENT | AR_INTERRUPT;  /* masking interrupt */
 
                 if (i == VECTOR_SYSCALL) {
                         /*
-                         * The syscall trap gate must be callable from
-                         * userland. Interrupts will remain enabled.
+                         * The syscall interrupt gate must be calleable from
+                         * userland.
                          */
-                        d->access = AR_PRESENT | AR_TRAP | DPL_USER;
-                } else {
-                        /*
-                         * Other interrupts use interrupt gates which
-                         * disable interrupts.
-                         */
-                        d->access = AR_PRESENT | AR_INTERRUPT;
+                        d->access |= DPL_USER;
                 }
+                
+                idt_setoffset(d, ((uintptr_t) interrupt_handlers) +
+                    i * interrupt_handler_size);
         }
-
-        d = &idt[0];
-        idt_setoffset(d++, (uintptr_t) &int_0);
-        idt_setoffset(d++, (uintptr_t) &int_1);
-        idt_setoffset(d++, (uintptr_t) &int_2);
-        idt_setoffset(d++, (uintptr_t) &int_3);
-        idt_setoffset(d++, (uintptr_t) &int_4);
-        idt_setoffset(d++, (uintptr_t) &int_5);
-        idt_setoffset(d++, (uintptr_t) &int_6);
-        idt_setoffset(d++, (uintptr_t) &int_7);
-        idt_setoffset(d++, (uintptr_t) &int_8);
-        idt_setoffset(d++, (uintptr_t) &int_9);
-        idt_setoffset(d++, (uintptr_t) &int_10);
-        idt_setoffset(d++, (uintptr_t) &int_11);
-        idt_setoffset(d++, (uintptr_t) &int_12);
-        idt_setoffset(d++, (uintptr_t) &int_13);
-        idt_setoffset(d++, (uintptr_t) &int_14);
-        idt_setoffset(d++, (uintptr_t) &int_15);
-        idt_setoffset(d++, (uintptr_t) &int_16);
-        idt_setoffset(d++, (uintptr_t) &int_17);
-        idt_setoffset(d++, (uintptr_t) &int_18);
-        idt_setoffset(d++, (uintptr_t) &int_19);
-        idt_setoffset(d++, (uintptr_t) &int_20);
-        idt_setoffset(d++, (uintptr_t) &int_21);
-        idt_setoffset(d++, (uintptr_t) &int_22);
-        idt_setoffset(d++, (uintptr_t) &int_23);
-        idt_setoffset(d++, (uintptr_t) &int_24);
-        idt_setoffset(d++, (uintptr_t) &int_25);
-        idt_setoffset(d++, (uintptr_t) &int_26);
-        idt_setoffset(d++, (uintptr_t) &int_27);
-        idt_setoffset(d++, (uintptr_t) &int_28);
-        idt_setoffset(d++, (uintptr_t) &int_29);
-        idt_setoffset(d++, (uintptr_t) &int_30);
-        idt_setoffset(d++, (uintptr_t) &int_31);
-        idt_setoffset(d++, (uintptr_t) &int_32);
-        idt_setoffset(d++, (uintptr_t) &int_33);
-        idt_setoffset(d++, (uintptr_t) &int_34);
-        idt_setoffset(d++, (uintptr_t) &int_35);
-        idt_setoffset(d++, (uintptr_t) &int_36);
-        idt_setoffset(d++, (uintptr_t) &int_37);
-        idt_setoffset(d++, (uintptr_t) &int_38);
-        idt_setoffset(d++, (uintptr_t) &int_39);
-        idt_setoffset(d++, (uintptr_t) &int_40);
-        idt_setoffset(d++, (uintptr_t) &int_41);
-        idt_setoffset(d++, (uintptr_t) &int_42);
-        idt_setoffset(d++, (uintptr_t) &int_43);
-        idt_setoffset(d++, (uintptr_t) &int_44);
-        idt_setoffset(d++, (uintptr_t) &int_45);
-        idt_setoffset(d++, (uintptr_t) &int_46);
-        idt_setoffset(d++, (uintptr_t) &int_47);
-        idt_setoffset(d++, (uintptr_t) &int_48);
-        idt_setoffset(d++, (uintptr_t) &int_49);
-        idt_setoffset(d++, (uintptr_t) &int_50);
-        idt_setoffset(d++, (uintptr_t) &int_51);
-        idt_setoffset(d++, (uintptr_t) &int_52);
-        idt_setoffset(d++, (uintptr_t) &int_53);
-        idt_setoffset(d++, (uintptr_t) &int_54);
-        idt_setoffset(d++, (uintptr_t) &int_55);
-        idt_setoffset(d++, (uintptr_t) &int_56);
-        idt_setoffset(d++, (uintptr_t) &int_57);
-        idt_setoffset(d++, (uintptr_t) &int_58);
-        idt_setoffset(d++, (uintptr_t) &int_59);
-        idt_setoffset(d++, (uintptr_t) &int_60);
-        idt_setoffset(d++, (uintptr_t) &int_61);
-        idt_setoffset(d++, (uintptr_t) &int_62);
-        idt_setoffset(d++, (uintptr_t) &int_63);
-
-        idt_setoffset(&idt[VECTOR_SYSCALL], (uintptr_t) &int_syscall);
-}
+}
+
 
 /* Clean IOPL(12,13) and NT(14) flags in EFLAGS register */
@@ -285 +215 @@
          * to its own TSS. We just need to load the TR register.
          */
-        tr_load(GDT_SELECTOR(TSS_DES));
+        tr_load(gdtselector(TSS_DES));
         
         clean_IOPL_NT_flags();    /* Disable I/O on nonprivileged levels and clear NT flag. */