Changes in kernel/arch/ia64/include/cpu.h [7a0359b:d99c1d2] in mainline
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kernel/arch/ia64/include/cpu.h
r7a0359b rd99c1d2 40 40 #include <arch/asm.h> 41 41 #include <arch/bootinfo.h> 42 #include <trace.h>43 42 44 #define FAMILY_ITANIUM 0x7 45 #define FAMILY_ITANIUM2 0x1f 46 47 #define CR64_ID_SHIFT 24 48 #define CR64_ID_MASK 0xff000000 49 #define CR64_EID_SHIFT 16 50 #define CR64_EID_MASK 0xff0000 43 #define FAMILY_ITANIUM 0x7 44 #define FAMILY_ITANIUM2 0x1f 51 45 52 46 typedef struct { … … 61 55 * 62 56 * @return Value of CPUID[n] register. 63 *64 57 */ 65 NO_TRACEstatic inline uint64_t cpuid_read(int n)58 static inline uint64_t cpuid_read(int n) 66 59 { 67 60 uint64_t v; 68 61 69 asm volatile ( 70 "mov %[v] = cpuid[%[r]]\n" 71 : [v] "=r" (v) 72 : [r] "r" (n) 73 ); 62 asm volatile ("mov %0 = cpuid[%1]\n" : "=r" (v) : "r" (n)); 74 63 75 64 return v; 76 65 } 77 66 78 NO_TRACE static inline int ia64_get_cpu_id(void) 67 68 #define CR64_ID_SHIFT 24 69 #define CR64_ID_MASK 0xff000000 70 #define CR64_EID_SHIFT 16 71 #define CR64_EID_MASK 0xff0000 72 73 static inline int ia64_get_cpu_id(void) 79 74 { 80 uint64_t cr64 =cr64_read();81 return ((CR64_ID_MASK) &cr64) >>CR64_ID_SHIFT;75 uint64_t cr64=cr64_read(); 76 return ((CR64_ID_MASK)&cr64)>>CR64_ID_SHIFT; 82 77 } 83 78 84 NO_TRACEstatic inline int ia64_get_cpu_eid(void)79 static inline int ia64_get_cpu_eid(void) 85 80 { 86 uint64_t cr64 =cr64_read();87 return ((CR64_EID_MASK) &cr64) >>CR64_EID_SHIFT;81 uint64_t cr64=cr64_read(); 82 return ((CR64_EID_MASK)&cr64)>>CR64_EID_SHIFT; 88 83 } 89 84 90 NO_TRACE static inline void ipi_send_ipi(int id, int eid, int intno) 85 86 static inline void ipi_send_ipi(int id, int eid, int intno) 91 87 { 92 88 (bootinfo->sapic)[2 * (id * 256 + eid)] = intno; 93 89 srlz_d(); 90 94 91 } 95 92
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