Changeset da02e69 in mainline
- Timestamp:
- 2006-09-13T14:23:22Z (18 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- b254b3b
- Parents:
- 34d9469e
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/src/fpu_context.c
r34d9469e rda02e69 40 40 void fpu_context_save(fpu_context_t *fctx) 41 41 { 42 fprs_reg_t fprs; 42 __asm__ volatile ( 43 "std %%f0, %0\n" 44 "std %%f2, %1\n" 45 "std %%f4, %2\n" 46 "std %%f6, %3\n" 47 "std %%f8, %4\n" 48 "std %%f10, %5\n" 49 "std %%f12, %6\n" 50 "std %%f14, %7\n" 51 "std %%f16, %8\n" 52 "std %%f18, %9\n" 53 "std %%f20, %10\n" 54 "std %%f22, %11\n" 55 "std %%f24, %12\n" 56 "std %%f26, %13\n" 57 "std %%f28, %14\n" 58 "std %%f30, %15\n" 59 : "=m" (fctx->d[0]), "=m" (fctx->d[1]), "=m" (fctx->d[2]), "=m" (fctx->d[3]), 60 "=m" (fctx->d[4]), "=m" (fctx->d[5]), "=m" (fctx->d[6]), "=m" (fctx->d[7]), 61 "=m" (fctx->d[8]), "=m" (fctx->d[9]), "=m" (fctx->d[10]), "=m" (fctx->d[11]), 62 "=m" (fctx->d[12]), "=m" (fctx->d[13]), "=m" (fctx->d[14]), "=m" (fctx->d[15]) 63 ); 64 65 /* 66 * We need to split loading of the floating-point registers because 67 * GCC (4.1.1) can't handle more than 30 operands in one asm statement. 68 */ 43 69 44 fprs.value = fprs_read(); 45 46 if (fprs.dl) { 47 /* 48 * The lower half of floating-point registers is dirty. 49 * Spill it to memory. 50 */ 51 __asm__ volatile ( 52 "std %%f0, %0\n" 53 "std %%f2, %1\n" 54 "std %%f4, %2\n" 55 "std %%f6, %3\n" 56 "std %%f8, %4\n" 57 "std %%f10, %5\n" 58 "std %%f12, %6\n" 59 "std %%f14, %7\n" 60 "std %%f16, %8\n" 61 "std %%f18, %9\n" 62 "std %%f20, %10\n" 63 "std %%f22, %11\n" 64 "std %%f24, %12\n" 65 "std %%f26, %13\n" 66 "std %%f28, %14\n" 67 "std %%f30, %15\n" 68 : "=m" (fctx->d[0]), "=m" (fctx->d[1]), "=m" (fctx->d[2]), "=m" (fctx->d[3]), 69 "=m" (fctx->d[4]), "=m" (fctx->d[5]), "=m" (fctx->d[6]), "=m" (fctx->d[7]), 70 "=m" (fctx->d[8]), "=m" (fctx->d[9]), "=m" (fctx->d[10]), "=m" (fctx->d[11]), 71 "=m" (fctx->d[12]), "=m" (fctx->d[13]), "=m" (fctx->d[14]), "=m" (fctx->d[15]) 72 ); 73 fprs.dl = false; 74 } 75 76 if (fprs.du) { 77 /* 78 * The upper half of floating-point registers is dirty. 79 * Spill it to memory. 80 */ 81 __asm__ volatile ( 82 "std %%f32, %0\n" 83 "std %%f34, %1\n" 84 "std %%f36, %2\n" 85 "std %%f38, %3\n" 86 "std %%f40, %4\n" 87 "std %%f42, %5\n" 88 "std %%f44, %6\n" 89 "std %%f46, %7\n" 90 "std %%f48, %8\n" 91 "std %%f50, %9\n" 92 "std %%f52, %10\n" 93 "std %%f54, %11\n" 94 "std %%f56, %12\n" 95 "std %%f58, %13\n" 96 "std %%f60, %14\n" 97 "std %%f62, %15\n" 98 : "=m" (fctx->d[16]), "=m" (fctx->d[17]), "=m" (fctx->d[18]), "=m" (fctx->d[19]), 99 "=m" (fctx->d[20]), "=m" (fctx->d[21]), "=m" (fctx->d[22]), "=m" (fctx->d[23]), 100 "=m" (fctx->d[24]), "=m" (fctx->d[25]), "=m" (fctx->d[26]), "=m" (fctx->d[27]), 101 "=m" (fctx->d[28]), "=m" (fctx->d[29]), "=m" (fctx->d[30]), "=m" (fctx->d[31]) 102 ); 103 fprs.du = false; 104 } 105 106 fprs_write(fprs.value); 70 __asm__ volatile ( 71 "std %%f32, %0\n" 72 "std %%f34, %1\n" 73 "std %%f36, %2\n" 74 "std %%f38, %3\n" 75 "std %%f40, %4\n" 76 "std %%f42, %5\n" 77 "std %%f44, %6\n" 78 "std %%f46, %7\n" 79 "std %%f48, %8\n" 80 "std %%f50, %9\n" 81 "std %%f52, %10\n" 82 "std %%f54, %11\n" 83 "std %%f56, %12\n" 84 "std %%f58, %13\n" 85 "std %%f60, %14\n" 86 "std %%f62, %15\n" 87 : "=m" (fctx->d[16]), "=m" (fctx->d[17]), "=m" (fctx->d[18]), "=m" (fctx->d[19]), 88 "=m" (fctx->d[20]), "=m" (fctx->d[21]), "=m" (fctx->d[22]), "=m" (fctx->d[23]), 89 "=m" (fctx->d[24]), "=m" (fctx->d[25]), "=m" (fctx->d[26]), "=m" (fctx->d[27]), 90 "=m" (fctx->d[28]), "=m" (fctx->d[29]), "=m" (fctx->d[30]), "=m" (fctx->d[31]) 91 ); 107 92 108 93 __asm__ volatile ("stx %%fsr, %0\n" : "=m" (fctx->fsr)); … … 111 96 void fpu_context_restore(fpu_context_t *fctx) 112 97 { 113 fprs_reg_t fprs;114 115 fprs.value = fprs_read();116 117 98 __asm__ volatile ( 118 99 "ldd %0, %%f0\n" … … 168 149 ); 169 150 170 fprs.dl = fprs.du = false;171 fprs_write(fprs.value);172 173 151 __asm__ volatile ("ldx %0, %%fsr\n" : : "m" (fctx->fsr)); 174 152 }
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