Index: kernel/arch/sparc64/src/fpu_context.c
===================================================================
--- kernel/arch/sparc64/src/fpu_context.c	(revision 6eabb6e6dd5893162a9219e82db2afee1e5b1cb0)
+++ kernel/arch/sparc64/src/fpu_context.c	(revision da02e6904415c1e00c96a488e305afe2512b066f)
@@ -40,69 +40,54 @@
 void fpu_context_save(fpu_context_t *fctx)
 {
-	fprs_reg_t fprs;
+	__asm__ volatile (
+		"std %%f0, %0\n"
+		"std %%f2, %1\n"
+		"std %%f4, %2\n"
+		"std %%f6, %3\n"
+		"std %%f8, %4\n"
+		"std %%f10, %5\n"
+		"std %%f12, %6\n"
+		"std %%f14, %7\n"
+		"std %%f16, %8\n"
+		"std %%f18, %9\n"
+		"std %%f20, %10\n"
+		"std %%f22, %11\n"
+		"std %%f24, %12\n"
+		"std %%f26, %13\n"
+		"std %%f28, %14\n"
+		"std %%f30, %15\n"
+		: "=m" (fctx->d[0]), "=m" (fctx->d[1]), "=m" (fctx->d[2]), "=m" (fctx->d[3]),
+		  "=m" (fctx->d[4]), "=m" (fctx->d[5]), "=m" (fctx->d[6]), "=m" (fctx->d[7]),
+		  "=m" (fctx->d[8]), "=m" (fctx->d[9]), "=m" (fctx->d[10]), "=m" (fctx->d[11]),
+		  "=m" (fctx->d[12]), "=m" (fctx->d[13]), "=m" (fctx->d[14]), "=m" (fctx->d[15])
+	);
+
+	/*
+	 * We need to split loading of the floating-point registers because
+	 * GCC (4.1.1) can't handle more than 30 operands in one asm statement.
+	 */
 	
-	fprs.value = fprs_read();
-
-	if (fprs.dl) {
-		/*
-		 * The lower half of floating-point registers is dirty.
-		 * Spill it to memory.
-		 */
-		__asm__ volatile (
-			"std %%f0, %0\n"
-			"std %%f2, %1\n"
-			"std %%f4, %2\n"
-			"std %%f6, %3\n"
-			"std %%f8, %4\n"
-			"std %%f10, %5\n"
-			"std %%f12, %6\n"
-			"std %%f14, %7\n"
-			"std %%f16, %8\n"
-			"std %%f18, %9\n"
-			"std %%f20, %10\n"
-			"std %%f22, %11\n"
-			"std %%f24, %12\n"
-			"std %%f26, %13\n"
-			"std %%f28, %14\n"
-			"std %%f30, %15\n"
-			: "=m" (fctx->d[0]), "=m" (fctx->d[1]), "=m" (fctx->d[2]), "=m" (fctx->d[3]),
-			  "=m" (fctx->d[4]), "=m" (fctx->d[5]), "=m" (fctx->d[6]), "=m" (fctx->d[7]),
-			  "=m" (fctx->d[8]), "=m" (fctx->d[9]), "=m" (fctx->d[10]), "=m" (fctx->d[11]),
-			  "=m" (fctx->d[12]), "=m" (fctx->d[13]), "=m" (fctx->d[14]), "=m" (fctx->d[15])
-		);
-		fprs.dl = false;
-	}
-	
-	if (fprs.du) {	
-		/*
-		 * The upper half of floating-point registers is dirty.
-		 * Spill it to memory.
-		 */
-		__asm__ volatile (
-			"std %%f32, %0\n"
-			"std %%f34, %1\n"
-			"std %%f36, %2\n"
-			"std %%f38, %3\n"
-			"std %%f40, %4\n"
-			"std %%f42, %5\n"
-			"std %%f44, %6\n"
-			"std %%f46, %7\n"
-			"std %%f48, %8\n"
-			"std %%f50, %9\n"
-			"std %%f52, %10\n"
-			"std %%f54, %11\n"
-			"std %%f56, %12\n"
-			"std %%f58, %13\n"
-			"std %%f60, %14\n"
-			"std %%f62, %15\n"
-			: "=m" (fctx->d[16]), "=m" (fctx->d[17]), "=m" (fctx->d[18]), "=m" (fctx->d[19]),
-			  "=m" (fctx->d[20]), "=m" (fctx->d[21]), "=m" (fctx->d[22]), "=m" (fctx->d[23]),
-			  "=m" (fctx->d[24]), "=m" (fctx->d[25]), "=m" (fctx->d[26]), "=m" (fctx->d[27]),
-			  "=m" (fctx->d[28]), "=m" (fctx->d[29]), "=m" (fctx->d[30]), "=m" (fctx->d[31])
-		);
-		fprs.du = false;
-	}
-	
-	fprs_write(fprs.value);
+	__asm__ volatile (
+		"std %%f32, %0\n"
+		"std %%f34, %1\n"
+		"std %%f36, %2\n"
+		"std %%f38, %3\n"
+		"std %%f40, %4\n"
+		"std %%f42, %5\n"
+		"std %%f44, %6\n"
+		"std %%f46, %7\n"
+		"std %%f48, %8\n"
+		"std %%f50, %9\n"
+		"std %%f52, %10\n"
+		"std %%f54, %11\n"
+		"std %%f56, %12\n"
+		"std %%f58, %13\n"
+		"std %%f60, %14\n"
+		"std %%f62, %15\n"
+		: "=m" (fctx->d[16]), "=m" (fctx->d[17]), "=m" (fctx->d[18]), "=m" (fctx->d[19]),
+		  "=m" (fctx->d[20]), "=m" (fctx->d[21]), "=m" (fctx->d[22]), "=m" (fctx->d[23]),
+		  "=m" (fctx->d[24]), "=m" (fctx->d[25]), "=m" (fctx->d[26]), "=m" (fctx->d[27]),
+		  "=m" (fctx->d[28]), "=m" (fctx->d[29]), "=m" (fctx->d[30]), "=m" (fctx->d[31])
+	);
 	
 	__asm__ volatile ("stx %%fsr, %0\n" : "=m" (fctx->fsr));
@@ -111,8 +96,4 @@
 void fpu_context_restore(fpu_context_t *fctx)
 {
-	fprs_reg_t fprs;
-	
-	fprs.value = fprs_read();
-	
 	__asm__ volatile (
 		"ldd %0, %%f0\n"
@@ -168,7 +149,4 @@
 	);
 	
-	fprs.dl = fprs.du = false;
-	fprs_write(fprs.value);
-	
 	__asm__ volatile ("ldx %0, %%fsr\n" : : "m" (fctx->fsr));
 }
