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  • kernel/arch/sparc64/src/mm/sun4u/as.c

    r74cbac7d rda1bafb  
    4141
    4242#ifdef CONFIG_TSB
     43
    4344#include <arch/mm/tsb.h>
    4445#include <arch/memstr.h>
     
    4748#include <bitops.h>
    4849#include <macros.h>
     50
    4951#endif /* CONFIG_TSB */
    5052
     
    5860}
    5961
    60 int as_constructor_arch(as_t *as, int flags)
     62int as_constructor_arch(as_t *as, unsigned int flags)
    6163{
    6264#ifdef CONFIG_TSB
     
    6466         * The order must be calculated with respect to the emulated
    6567         * 16K page size.
    66          */
    67         int order = fnzb32(((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
     68         *
     69         */
     70        uint8_t order = fnzb32(((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
    6871            sizeof(tsb_entry_t)) >> FRAME_WIDTH);
    69 
     72       
    7073        uintptr_t tsb = (uintptr_t) frame_alloc(order, flags | FRAME_KA);
    71 
     74       
    7275        if (!tsb)
    7376                return -1;
    74 
     77       
    7578        as->arch.itsb = (tsb_entry_t *) tsb;
    7679        as->arch.dtsb = (tsb_entry_t *) (tsb + ITSB_ENTRY_COUNT *
    7780            sizeof(tsb_entry_t));
    78 
     81       
    7982        memsetb(as->arch.itsb,
    8083            (ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) * sizeof(tsb_entry_t), 0);
    8184#endif
     85       
    8286        return 0;
    8387}
     
    9397            sizeof(tsb_entry_t)) >> FRAME_WIDTH;
    9498        frame_free(KA2PA((uintptr_t) as->arch.itsb));
     99       
    95100        return cnt;
    96101#else
     
    99104}
    100105
    101 int as_create_arch(as_t *as, int flags)
     106int as_create_arch(as_t *as, unsigned int flags)
    102107{
    103108#ifdef CONFIG_TSB
    104109        tsb_invalidate(as, 0, (size_t) -1);
    105110#endif
     111       
    106112        return 0;
    107113}
     
    123129         *
    124130         * Moreover, the as->asid is protected by asidlock, which is being held.
     131         *
    125132         */
    126133       
     
    130137         * secondary context register from the TL=1 code just before switch to
    131138         * userspace.
     139         *
    132140         */
    133141        ctx.v = 0;
    134142        ctx.context = as->asid;
    135143        mmu_secondary_context_write(ctx.v);
    136 
    137 #ifdef CONFIG_TSB       
     144       
     145#ifdef CONFIG_TSB
    138146        uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
    139 
     147       
    140148        ASSERT(as->arch.itsb && as->arch.dtsb);
    141 
     149       
    142150        uintptr_t tsb = (uintptr_t) as->arch.itsb;
    143                
     151       
    144152        if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
    145153                /*
     
    147155                 * by the locked 4M kernel DTLB entry. We need
    148156                 * to map both TSBs explicitly.
     157                 *
    149158                 */
    150159                dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
    151160                dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
    152161        }
    153                
     162       
    154163        /*
    155164         * Setup TSB Base registers.
     165         *
    156166         */
    157167        tsb_base_reg_t tsb_base;
    158                
     168       
    159169        tsb_base.value = 0;
    160170        tsb_base.size = TSB_SIZE;
    161171        tsb_base.split = 0;
    162 
     172       
    163173        tsb_base.base = ((uintptr_t) as->arch.itsb) >> MMU_PAGE_WIDTH;
    164174        itsb_base_write(tsb_base.value);
     
    175185         * Clearing the extension registers will ensure that the value of the
    176186         * TSB Base register will be used as an address of TSB, making the code
    177          * compatible with the US port.
     187         * compatible with the US port.
     188         *
    178189         */
    179190        itsb_primary_extension_write(0);
     
    195206void as_deinstall_arch(as_t *as)
    196207{
    197 
    198208        /*
    199209         * Note that we don't and may not lock the address space. That's ok
     
    201211         *
    202212         * Moreover, the as->asid is protected by asidlock, which is being held.
    203          */
    204 
     213         *
     214         */
     215       
    205216#ifdef CONFIG_TSB
    206217        uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
    207 
     218       
    208219        ASSERT(as->arch.itsb && as->arch.dtsb);
    209 
     220       
    210221        uintptr_t tsb = (uintptr_t) as->arch.itsb;
    211                
     222       
    212223        if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
    213224                /*
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