Changes in kernel/arch/ppc32/src/asm.S [b60c582:da52547] in mainline

File:

• kernel/arch/ppc32/src/asm.S (modified) (7 diffs)

kernel/arch/ppc32/src/asm.S

@@ -1 @@
-#
-# Copyright (c) 2005 Martin Decky
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# - Redistributions of source code must retain the above copyright
-#   notice, this list of conditions and the following disclaimer.
-# - Redistributions in binary form must reproduce the above copyright
-#   notice, this list of conditions and the following disclaimer in the
-#   documentation and/or other materials provided with the distribution.
-# - The name of the author may not be used to endorse or promote products
-#   derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
-# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
-# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
-# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
+/*
+ * Copyright (c) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
 
 #include <arch/asm/regname.h>
+#include <arch/cpu.h>
 
 .text
@@ -41 +42 @@
 .global memcpy_from_uspace_failover_address
 .global memcpy_to_uspace_failover_address
+.global early_putchar
 
 userspace_asm:
-
-        # r3 = uspace_uarg
-        # r4 = stack
-        # r5 = entry
-        
-        # disable interrupts
-
+        
+        /*
+         * r3 = uspace_uarg
+         * r4 = stack
+         * r5 = entry
+         */
+        
+        /* Disable interrupts */
+        
         mfmsr r31
         rlwinm r31, r31, 0, 17, 15
         mtmsr r31
         
-        # set entry point
+        /* Set entry point */
         
         mtsrr0 r5
         
-        # set problem state, enable interrupts
-        
-        ori r31, r31, msr_pr
-        ori r31, r31, msr_ee
+        /* Set problem state, enable interrupts */
+        
+        ori r31, r31, MSR_PR
+        ori r31, r31, MSR_EE
         mtsrr1 r31
         
-        # set stack
+        /* Set stack */
         
         mr sp, r4
-
-        # %r6 is defined to hold pcb_ptr - set it to 0
-
+        
+        /* %r6 is defined to hold pcb_ptr - set it to 0 */
+        
         xor r6, r6, r6
         
-        # jump to userspace
+        /* Jump to userspace */
         
         rfi
@@ -78 +82 @@
 iret:
         
-        # disable interrupts
+        /* Disable interrupts */
         
         mfmsr r31
@@ -140 +144 @@
 iret_syscall:
         
-        # reset decrementer
-
+        /* Reset decrementer */
+        
         li r31, 1000
         mtdec r31
         
-        # disable interrupts
+        /* Disable interrupts */
         
         mfmsr r31
@@ -201 +205 @@
         lwz r12, 156(sp)
         lwz sp, 160(sp)
-
+        
         rfi
 
@@ -213 +217 @@
 memcpy_from_uspace:
 memcpy_to_uspace:
-
+        
         srwi. r7, r5, 3
         addi r6, r3, -4
         addi r4, r4, -4
-        beq     2f
+        beq 2f
         
         andi. r0, r6, 3
@@ -225 +229 @@
         1:
         
-        lwz r7, 4(r4)
-        lwzu r8, 8(r4)
-        stw r7, 4(r6)
-        stwu r8, 8(r6)
-        bdnz 1b
-        
-        andi. r5, r5, 7
+                lwz r7, 4(r4)
+                lwzu r8, 8(r4)
+                stw r7, 4(r6)
+                stwu r8, 8(r6)
+                bdnz 1b
+                
+                andi. r5, r5, 7
         
         2:
         
-        cmplwi 0, r5, 4
-        blt 3f
-        
-        lwzu r0, 4(r4)
-        addi r5, r5, -4
-        stwu r0, 4(r6)
+                cmplwi 0, r5, 4
+                blt 3f
+                
+                lwzu r0, 4(r4)
+                addi r5, r5, -4
+                stwu r0, 4(r6)
         
         3:
         
-        cmpwi 0, r5, 0
-        beqlr
-        mtctr r5
-        addi r4, r4, 3
-        addi r6, r6, 3
+                cmpwi 0, r5, 0
+                beqlr
+                mtctr r5
+                addi r4, r4, 3
+                addi r6, r6, 3
         
         4:
         
-        lbzu r0, 1(r4)
-        stbu r0, 1(r6)
-        bdnz 4b
-        blr
+                lbzu r0, 1(r4)
+                stbu r0, 1(r6)
+                bdnz 4b
+                blr
         
         5:
         
-        subfic r0, r0, 4
-        mtctr r0
+                subfic r0, r0, 4
+                mtctr r0
         
         6:
         
-        lbz r7, 4(r4)
-        addi r4, r4, 1
-        stb r7, 4(r6)
-        addi r6, r6, 1
-        bdnz 6b
-        subf r5, r0, r5
-        rlwinm. r7, r5, 32-3, 3, 31
-        beq 2b
-        mtctr r7
-        b 1b
+                lbz r7, 4(r4)
+                addi r4, r4, 1
+                stb r7, 4(r6)
+                addi r6, r6, 1
+                bdnz 6b
+                subf r5, r0, r5
+                rlwinm. r7, r5, 32-3, 3, 31
+                beq 2b
+                mtctr r7
+                b 1b
 
 memcpy_from_uspace_failover_address:
 memcpy_to_uspace_failover_address:
-        # return zero, failure
+        /* Return zero, failure */
         xor r3, r3, r3
         blr
+
+early_putchar:
+        blr