Changeset dbb6886 in mainline
- Timestamp:
- 2005-12-13T22:53:26Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 8ad925c
- Parents:
- 91ef0d95
- Location:
- arch/sparc64
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/sparc64/include/mm/asid.h
r91ef0d95 rdbb6886 30 30 #define __sparc64_ASID_H__ 31 31 32 typedef int asid_t; 32 #include <arch/types.h> 33 34 /* 35 * On SPARC, Context means the same thing as ASID trough out the kernel. 36 */ 37 typedef __u16 asid_t; 33 38 34 39 #define asid_get() 0 -
arch/sparc64/include/mm/page.h
r91ef0d95 rdbb6886 67 67 #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) 68 68 69 union page_address { 70 __address address; 71 struct { 72 __u64 vpn : 51; /**< Virtual Page Number. */ 73 unsigned offset : 13; /**< Offset. */ 74 } __attribute__ ((packed)); 75 }; 76 77 typedef union page_address page_address_t; 78 69 79 extern void page_arch_init(void); 70 80 -
arch/sparc64/include/mm/tlb.h
r91ef0d95 rdbb6886 31 31 32 32 #include <arch/mm/tte.h> 33 #include <arch/mm/page.h> 33 34 #include <arch/asm.h> 34 35 #include <arch/barrier.h> … … 94 95 __u64 value; 95 96 struct { 96 __u64 v a : 51; /**< Virtual Address. */97 __u64 vpn : 51; /**< Virtual Address bits 63:13. */ 97 98 unsigned context : 13; /**< Context identifier. */ 98 99 } __attribute__ ((packed)); … … 101 102 typedef union tlb_tag_read_reg tlb_tag_access_reg_t; 102 103 104 /** TLB Demap Operation types. */ 105 #define TLB_DEMAP_PAGE 0 106 #define TLB_DEMAP_CONTEXT 1 107 108 /** TLB Demap Operation Context register encodings. */ 109 #define TLB_DEMAP_PRIMARY 0 110 #define TLB_DEMAP_SECONDARY 1 111 #define TLB_DEMAP_NUCLEUS 2 112 113 /** TLB Demap Operation Address. */ 114 union tlb_demap_addr { 115 __u64 value; 116 struct { 117 __u64 vpn: 51; /**< Virtual Address bits 63:13. */ 118 unsigned : 6; /**< Ignored. */ 119 unsigned type : 1; /**< The type of demap operation. */ 120 unsigned context : 2; /**< Context register selection. */ 121 unsigned : 4; /**< Zero. */ 122 } __attribute__ ((packed)); 123 }; 124 typedef union tlb_demap_addr tlb_demap_addr_t; 125 103 126 /** Read IMMU TLB Data Access Register. 104 127 * … … 116 139 } 117 140 141 /** Write IMMU TLB Data Access Register. 142 * 143 * @param entry TLB Entry index. 144 * @param value Value to be written. 145 */ 146 static inline __u64 itlb_data_access_write(index_t entry, __u64 value) 147 { 148 tlb_data_access_addr_t reg; 149 150 reg.value = 0; 151 reg.tlb_entry = entry; 152 asi_u64_write(ASI_ITLB_DATA_ACCESS_REG, reg.value, value); 153 flush(); 154 } 155 118 156 /** Read DMMU TLB Data Access Register. 119 157 * … … 131 169 } 132 170 171 /** Write DMMU TLB Data Access Register. 172 * 173 * @param entry TLB Entry index. 174 * @param value Value to be written. 175 */ 176 static inline __u64 dtlb_data_access_write(index_t entry, __u64 value) 177 { 178 tlb_data_access_addr_t reg; 179 180 reg.value = 0; 181 reg.tlb_entry = entry; 182 asi_u64_write(ASI_DTLB_DATA_ACCESS_REG, reg.value, value); 183 flush(); 184 } 185 133 186 /** Read IMMU TLB Tag Read Register. 134 187 * … … 201 254 } 202 255 256 /** Perform IMMU TLB Demap Operation. 257 * 258 * @param type Selects between context and page demap. 259 * @param context_encoding Specifies which Context register has Context ID for demap. 260 * @param page Address which is on the page to be demapped. 261 */ 262 static inline void itlb_demap(int type, int context_encoding, __address page) 263 { 264 tlb_demap_addr_t da; 265 page_address_t pg; 266 267 da.value = 0; 268 pg.address = page; 269 270 da.type = type; 271 da.context = context_encoding; 272 da.vpn = pg.vpn; 273 274 asi_u64_write(ASI_IMMU_DEMAP, da.value, 0); 275 flush(); 276 } 277 278 /** Perform DMMU TLB Demap Operation. 279 * 280 * @param type Selects between context and page demap. 281 * @param context_encoding Specifies which Context register has Context ID for demap. 282 * @param page Address which is on the page to be demapped. 283 */ 284 static inline void dtlb_demap(int type, int context_encoding, __address page) 285 { 286 tlb_demap_addr_t da; 287 page_address_t pg; 288 289 da.value = 0; 290 pg.address = page; 291 292 da.type = type; 293 da.context = context_encoding; 294 da.vpn = pg.vpn; 295 296 asi_u64_write(ASI_DMMU_DEMAP, da.value, 0); 297 flush(); 298 } 299 203 300 #endif -
arch/sparc64/include/mm/tte.h
r91ef0d95 rdbb6886 56 56 unsigned soft2 : 9; /**< Software defined field. */ 57 57 unsigned diag : 9; /**< Diagnostic data. */ 58 unsigned p a : 28; /**< Physical page number. */58 unsigned pfn : 28; /**< Physical Address bits, bits 40:13. */ 59 59 unsigned soft : 6; /**< Software defined field. */ 60 60 unsigned l : 1; /**< Lock. */ -
arch/sparc64/src/mm/tlb.c
r91ef0d95 rdbb6886 30 30 #include <mm/tlb.h> 31 31 #include <print.h> 32 #include <arch/types.h> 33 #include <typedefs.h> 32 34 33 35 void tlb_arch_init(void) … … 47 49 t.value = itlb_tag_read_read(i); 48 50 49 printf("%d: v a=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pa=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",50 i, t.v a, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pa, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);51 printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", 52 i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g); 51 53 } 52 54 … … 56 58 t.value = dtlb_tag_read_read(i); 57 59 58 printf("%d: v a=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pa=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",59 i, t.v a, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pa, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);60 printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", 61 i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g); 60 62 } 61 63 62 64 } 65 66 /** Invalidate all unlocked ITLB and DTLB entries. */ 67 void tlb_invalidate_all(void) 68 { 69 int i; 70 tlb_data_t d; 71 tlb_tag_read_reg_t t; 72 73 for (i = 0; i < ITLB_ENTRY_COUNT; i++) { 74 d.value = itlb_data_access_read(i); 75 if (!d.l) { 76 printf("invalidating "); 77 t.value = itlb_tag_read_read(i); 78 d.v = false; 79 itlb_tag_access_write(t.value); 80 itlb_data_access_write(i, d.value); 81 } 82 } 83 84 for (i = 0; i < DTLB_ENTRY_COUNT; i++) { 85 d.value = dtlb_data_access_read(i); 86 if (!d.l) { 87 t.value = dtlb_tag_read_read(i); 88 d.v = false; 89 dtlb_tag_access_write(t.value); 90 dtlb_data_access_write(i, d.value); 91 } 92 } 93 94 } 95 96 /** Invalidate all ITLB and DTLB entries that belong to specified ASID (Context). 97 * 98 * @param asid Address Space ID. 99 */ 100 void tlb_invalidate_asid(asid_t asid) 101 { 102 /* TODO: write asid to some Context register and encode the register in second parameter below. */ 103 itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0); 104 dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0); 105 } 106 107 /** Invalidate all ITLB and DLTB entries for specified page in specified address space. 108 * 109 * @param asid Address Space ID. 110 * @param page Page which to sweep out from ITLB and DTLB. 111 */ 112 void tlb_invalidate_page(asid_t asid, __address page) 113 { 114 /* TODO: write asid to some Context register and encode the register in second parameter below. */ 115 itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page); 116 dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page); 117 }
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