Changeset dbd4ae5 in mainline
- Timestamp:
- 2010-07-02T09:59:49Z (15 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- e837f30
- Parents:
- eedf4c5
- File:
-
- 1 edited
-
kernel/arch/sparc64/src/asm.S (modified) (7 diffs)
Legend:
- Unmodified
- Added
- Removed
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kernel/arch/sparc64/src/asm.S
reedf4c5 rdbd4ae5 1 # 2 #Copyright (c) 2005 Jakub Jermar3 #All rights reserved.4 # 5 #Redistribution and use in source and binary forms, with or without6 #modification, are permitted provided that the following conditions7 #are met:8 # 9 #- Redistributions of source code must retain the above copyright10 #notice, this list of conditions and the following disclaimer.11 #- Redistributions in binary form must reproduce the above copyright12 #notice, this list of conditions and the following disclaimer in the13 #documentation and/or other materials provided with the distribution.14 #- The name of the author may not be used to endorse or promote products15 #derived from this software without specific prior written permission.16 # 17 #THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR18 #IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES19 #OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.20 #IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,21 #INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT22 #NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,23 #DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY24 #THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT25 #(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF26 #THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.27 # 1 /* 2 * Copyright (c) 2005 Jakub Jermar 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * - Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * - Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * - The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 28 29 29 #include <arch/arch.h> … … 32 32 .text 33 33 34 .register 35 .register 34 .register %g2, #scratch 35 .register %g3, #scratch 36 36 37 37 /* … … 40 40 .global memcpy 41 41 memcpy: 42 mov %o0, %o3 ! save dst 43 add %o1, 7, %g1 44 and %g1, -8, %g1 45 cmp %o1, %g1 46 be,pn %xcc, 3f 47 add %o0, 7, %g1 48 mov 0, %g3 49 0: 50 brz,pn %o2, 2f 51 mov 0, %g2 52 1: 53 ldub [%g3 + %o1], %g1 54 add %g2, 1, %g2 55 cmp %o2, %g2 56 stb %g1, [%g3 + %o0] 57 bne,pt %xcc, 1b 58 mov %g2, %g3 59 2: 60 jmp %o7 + 8 ! exit point 61 mov %o3, %o0 62 3: 63 and %g1, -8, %g1 64 cmp %o0, %g1 65 bne,pt %xcc, 0b 66 mov 0, %g3 67 srlx %o2, 3, %g4 68 brz,pn %g4, 5f 69 mov 0, %g5 70 4: 71 sllx %g3, 3, %g2 72 add %g5, 1, %g3 73 ldx [%o1 + %g2], %g1 74 mov %g3, %g5 75 cmp %g4, %g3 76 bne,pt %xcc, 4b 77 stx %g1, [%o0 + %g2] 78 5: 79 and %o2, 7, %o2 80 brz,pn %o2, 2b 81 sllx %g4, 3, %g1 82 mov 0, %g2 83 add %g1, %o0, %o0 84 add %g1, %o1, %g4 85 mov 0, %g3 86 6: 87 ldub [%g2 + %g4], %g1 88 stb %g1, [%g2 + %o0] 89 add %g3, 1, %g2 90 cmp %o2, %g2 91 bne,pt %xcc, 6b 92 mov %g2, %g3 93 94 jmp %o7 + 8 ! exit point 95 mov %o3, %o0 42 mov %o0, %o3 /* save dst */ 43 add %o1, 7, %g1 44 and %g1, -8, %g1 45 cmp %o1, %g1 46 be,pn %xcc, 3f 47 add %o0, 7, %g1 48 mov 0, %g3 49 50 0: 51 52 brz,pn %o2, 2f 53 mov 0, %g2 54 55 1: 56 57 ldub [%g3 + %o1], %g1 58 add %g2, 1, %g2 59 cmp %o2, %g2 60 stb %g1, [%g3 + %o0] 61 bne,pt %xcc, 1b 62 mov %g2, %g3 63 64 2: 65 66 jmp %o7 + 8 /* exit point */ 67 mov %o3, %o0 68 69 3: 70 71 and %g1, -8, %g1 72 cmp %o0, %g1 73 bne,pt %xcc, 0b 74 mov 0, %g3 75 srlx %o2, 3, %g4 76 brz,pn %g4, 5f 77 mov 0, %g5 78 79 4: 80 81 sllx %g3, 3, %g2 82 add %g5, 1, %g3 83 ldx [%o1 + %g2], %g1 84 mov %g3, %g5 85 cmp %g4, %g3 86 bne,pt %xcc, 4b 87 stx %g1, [%o0 + %g2] 88 89 5: 90 91 and %o2, 7, %o2 92 brz,pn %o2, 2b 93 sllx %g4, 3, %g1 94 mov 0, %g2 95 add %g1, %o0, %o0 96 add %g1, %o1, %g4 97 mov 0, %g3 98 99 6: 100 101 ldub [%g2 + %g4], %g1 102 stb %g1, [%g2 + %o0] 103 add %g3, 1, %g2 104 cmp %o2, %g2 105 bne,pt %xcc, 6b 106 mov %g2, %g3 107 108 jmp %o7 + 8 /* exit point */ 109 mov %o3, %o0 96 110 97 111 /* … … 100 114 .global memcpy_from_uspace 101 115 memcpy_from_uspace: 102 mov %o0, %o3 ! save dst 103 add %o1, 7, %g1 104 and %g1, -8, %g1 105 cmp %o1, %g1 106 be,pn %xcc, 3f 107 add %o0, 7, %g1 108 mov 0, %g3 109 0: 110 brz,pn %o2, 2f 111 mov 0, %g2 112 1: 113 lduba [%g3 + %o1] ASI_AIUS, %g1 114 add %g2, 1, %g2 115 cmp %o2, %g2 116 stb %g1, [%g3 + %o0] 117 bne,pt %xcc, 1b 118 mov %g2, %g3 119 2: 120 jmp %o7 + 8 ! exit point 121 mov %o3, %o0 122 3: 123 and %g1, -8, %g1 124 cmp %o0, %g1 125 bne,pt %xcc, 0b 126 mov 0, %g3 127 srlx %o2, 3, %g4 128 brz,pn %g4, 5f 129 mov 0, %g5 130 4: 131 sllx %g3, 3, %g2 132 add %g5, 1, %g3 133 ldxa [%o1 + %g2] ASI_AIUS, %g1 134 mov %g3, %g5 135 cmp %g4, %g3 136 bne,pt %xcc, 4b 137 stx %g1, [%o0 + %g2] 138 5: 139 and %o2, 7, %o2 140 brz,pn %o2, 2b 141 sllx %g4, 3, %g1 142 mov 0, %g2 143 add %g1, %o0, %o0 144 add %g1, %o1, %g4 145 mov 0, %g3 146 6: 147 lduba [%g2 + %g4] ASI_AIUS, %g1 148 stb %g1, [%g2 + %o0] 149 add %g3, 1, %g2 150 cmp %o2, %g2 151 bne,pt %xcc, 6b 152 mov %g2, %g3 153 154 jmp %o7 + 8 ! exit point 155 mov %o3, %o0 116 mov %o0, %o3 /* save dst */ 117 add %o1, 7, %g1 118 and %g1, -8, %g1 119 cmp %o1, %g1 120 be,pn %xcc, 3f 121 add %o0, 7, %g1 122 mov 0, %g3 123 124 0: 125 126 brz,pn %o2, 2f 127 mov 0, %g2 128 129 1: 130 131 lduba [%g3 + %o1] ASI_AIUS, %g1 132 add %g2, 1, %g2 133 cmp %o2, %g2 134 stb %g1, [%g3 + %o0] 135 bne,pt %xcc, 1b 136 mov %g2, %g3 137 138 2: 139 140 jmp %o7 + 8 /* exit point */ 141 mov %o3, %o0 142 143 3: 144 145 and %g1, -8, %g1 146 cmp %o0, %g1 147 bne,pt %xcc, 0b 148 mov 0, %g3 149 srlx %o2, 3, %g4 150 brz,pn %g4, 5f 151 mov 0, %g5 152 153 4: 154 155 sllx %g3, 3, %g2 156 add %g5, 1, %g3 157 ldxa [%o1 + %g2] ASI_AIUS, %g1 158 mov %g3, %g5 159 cmp %g4, %g3 160 bne,pt %xcc, 4b 161 stx %g1, [%o0 + %g2] 162 163 5: 164 165 and %o2, 7, %o2 166 brz,pn %o2, 2b 167 sllx %g4, 3, %g1 168 mov 0, %g2 169 add %g1, %o0, %o0 170 add %g1, %o1, %g4 171 mov 0, %g3 172 173 6: 174 175 lduba [%g2 + %g4] ASI_AIUS, %g1 176 stb %g1, [%g2 + %o0] 177 add %g3, 1, %g2 178 cmp %o2, %g2 179 bne,pt %xcc, 6b 180 mov %g2, %g3 181 182 jmp %o7 + 8 /* exit point */ 183 mov %o3, %o0 156 184 157 185 /* … … 160 188 .global memcpy_to_uspace 161 189 memcpy_to_uspace: 162 mov %o0, %o3 ! save dst 163 add %o1, 7, %g1 164 and %g1, -8, %g1 165 cmp %o1, %g1 166 be,pn %xcc, 3f 167 add %o0, 7, %g1 168 mov 0, %g3 169 0: 170 brz,pn %o2, 2f 171 mov 0, %g2 172 1: 173 ldub [%g3 + %o1], %g1 174 add %g2, 1, %g2 175 cmp %o2, %g2 176 stba %g1, [%g3 + %o0] ASI_AIUS 177 bne,pt %xcc, 1b 178 mov %g2, %g3 179 2: 180 jmp %o7 + 8 ! exit point 181 mov %o3, %o0 182 3: 183 and %g1, -8, %g1 184 cmp %o0, %g1 185 bne,pt %xcc, 0b 186 mov 0, %g3 187 srlx %o2, 3, %g4 188 brz,pn %g4, 5f 189 mov 0, %g5 190 4: 191 sllx %g3, 3, %g2 192 add %g5, 1, %g3 193 ldx [%o1 + %g2], %g1 194 mov %g3, %g5 195 cmp %g4, %g3 196 bne,pt %xcc, 4b 197 stxa %g1, [%o0 + %g2] ASI_AIUS 198 5: 199 and %o2, 7, %o2 200 brz,pn %o2, 2b 201 sllx %g4, 3, %g1 202 mov 0, %g2 203 add %g1, %o0, %o0 204 add %g1, %o1, %g4 205 mov 0, %g3 206 6: 207 ldub [%g2 + %g4], %g1 208 stba %g1, [%g2 + %o0] ASI_AIUS 209 add %g3, 1, %g2 210 cmp %o2, %g2 211 bne,pt %xcc, 6b 212 mov %g2, %g3 213 214 jmp %o7 + 8 ! exit point 215 mov %o3, %o0 190 mov %o0, %o3 /* save dst */ 191 add %o1, 7, %g1 192 and %g1, -8, %g1 193 cmp %o1, %g1 194 be,pn %xcc, 3f 195 add %o0, 7, %g1 196 mov 0, %g3 197 198 0: 199 200 brz,pn %o2, 2f 201 mov 0, %g2 202 203 1: 204 205 ldub [%g3 + %o1], %g1 206 add %g2, 1, %g2 207 cmp %o2, %g2 208 stba %g1, [%g3 + %o0] ASI_AIUS 209 bne,pt %xcc, 1b 210 mov %g2, %g3 211 212 2: 213 214 jmp %o7 + 8 /* exit point */ 215 mov %o3, %o0 216 217 3: 218 219 and %g1, -8, %g1 220 cmp %o0, %g1 221 bne,pt %xcc, 0b 222 mov 0, %g3 223 srlx %o2, 3, %g4 224 brz,pn %g4, 5f 225 mov 0, %g5 226 227 4: 228 229 sllx %g3, 3, %g2 230 add %g5, 1, %g3 231 ldx [%o1 + %g2], %g1 232 mov %g3, %g5 233 cmp %g4, %g3 234 bne,pt %xcc, 4b 235 stxa %g1, [%o0 + %g2] ASI_AIUS 236 237 5: 238 239 and %o2, 7, %o2 240 brz,pn %o2, 2b 241 sllx %g4, 3, %g1 242 mov 0, %g2 243 add %g1, %o0, %o0 244 add %g1, %o1, %g4 245 mov 0, %g3 246 247 6: 248 249 ldub [%g2 + %g4], %g1 250 stba %g1, [%g2 + %o0] ASI_AIUS 251 add %g3, 1, %g2 252 cmp %o2, %g2 253 bne,pt %xcc, 6b 254 mov %g2, %g3 255 256 jmp %o7 + 8 /* exit point */ 257 mov %o3, %o0 216 258 217 259 .global memcpy_from_uspace_failover_address … … 219 261 memcpy_from_uspace_failover_address: 220 262 memcpy_to_uspace_failover_address: 221 jmp %o7 + 8 ! exit point222 mov %g0, %o0 ! return 0 on failure263 jmp %o7 + 8 /* exit point */ 264 mov %g0, %o0 /* return 0 on failure */ 223 265 224 266 .global memsetb … … 231 273 ba %xcc, _memsetw 232 274 nop 233
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