Changes in kernel/arch/amd64/include/mm/page.h [7a0359b:dc0b964] in mainline
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kernel/arch/amd64/include/mm/page.h
r7a0359b rdc0b964 55 55 #ifndef __ASM__ 56 56 57 #define KA2PA(x) (((uintptr_t) (x)) - 0xffff800000000000)58 #define PA2KA(x) (((uintptr_t) (x)) + 0xffff800000000000)57 #define KA2PA(x) (((uintptr_t) (x)) - UINT64_C(0xffff800000000000)) 58 #define PA2KA(x) (((uintptr_t) (x)) + UINT64_C(0xffff800000000000)) 59 59 60 60 #else /* __ASM__ */ … … 78 78 79 79 /* Macros calculating indices into page tables in each level. */ 80 #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 39) & 0x1ff )81 #define PTL1_INDEX_ARCH(vaddr) (((vaddr) >> 30) & 0x1ff )82 #define PTL2_INDEX_ARCH(vaddr) (((vaddr) >> 21) & 0x1ff )83 #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x1ff )80 #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 39) & 0x1ffU) 81 #define PTL1_INDEX_ARCH(vaddr) (((vaddr) >> 30) & 0x1ffU) 82 #define PTL2_INDEX_ARCH(vaddr) (((vaddr) >> 21) & 0x1ffU) 83 #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x1ffU) 84 84 85 85 /* Get PTE address accessors for each level. */ … … 205 205 pte_t *p = &pt[i]; 206 206 207 p->addr_12_31 = (a >> 12) & 0xfffff;207 p->addr_12_31 = (a >> 12) & UINT32_C(0xfffff); 208 208 p->addr_32_51 = a >> 32; 209 209 }
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