Changes in kernel/arch/amd64/include/mm/page.h [98000fb:dc0b964] in mainline
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kernel/arch/amd64/include/mm/page.h
r98000fb rdc0b964 35 35 /** Paging on AMD64 36 36 * 37 * The space is divided in positive numbers - userspace and 38 * negative numbers - kernel space. The 'negative' space starting 39 * with 0xffff800000000000 and ending with 0xffffffff80000000 40 * (-2GB) is identically mapped physical memory. The area 41 * (0xffffffff80000000 ... 0xffffffffffffffff is again identically 42 * mapped first 2GB. 43 * 44 * ATTENTION - PA2KA(KA2PA(x)) != x if 'x' is in kernel 37 * The space is divided in positive numbers (uspace) and 38 * negative numbers (kernel). The 'negative' space starting 39 * with 0xffff800000000000 and ending with 0xffffffffffffffff 40 * is identically mapped physical memory. 41 * 45 42 */ 46 43 … … 49 46 50 47 #include <arch/mm/frame.h> 51 52 #define PAGE_WIDTH FRAME_WIDTH 53 #define PAGE_SIZE FRAME_SIZE 48 #include <trace.h> 49 50 #define PAGE_WIDTH FRAME_WIDTH 51 #define PAGE_SIZE FRAME_SIZE 54 52 55 53 #ifdef KERNEL 56 54 57 55 #ifndef __ASM__ 58 # include <mm/mm.h> 59 # include <arch/types.h> 60 # include <arch/interrupt.h> 61 62 static inline uintptr_t ka2pa(uintptr_t x) 63 { 64 if (x > 0xffffffff80000000) 65 return x - 0xffffffff80000000; 66 else 67 return x - 0xffff800000000000; 68 } 69 70 # define KA2PA(x) ka2pa((uintptr_t) x) 71 # define PA2KA_CODE(x) (((uintptr_t) (x)) + 0xffffffff80000000) 72 # define PA2KA(x) (((uintptr_t) (x)) + 0xffff800000000000) 73 #else 74 # define KA2PA(x) ((x) - 0xffffffff80000000) 75 # define PA2KA(x) ((x) + 0xffffffff80000000) 76 #endif 56 57 #define KA2PA(x) (((uintptr_t) (x)) - UINT64_C(0xffff800000000000)) 58 #define PA2KA(x) (((uintptr_t) (x)) + UINT64_C(0xffff800000000000)) 59 60 #else /* __ASM__ */ 61 62 #define KA2PA(x) ((x) - 0xffff800000000000) 63 #define PA2KA(x) ((x) + 0xffff800000000000) 64 65 #endif /* __ASM__ */ 77 66 78 67 /* Number of entries in each level. */ 79 #define PTL0_ENTRIES_ARCH 80 #define PTL1_ENTRIES_ARCH 81 #define PTL2_ENTRIES_ARCH 82 #define PTL3_ENTRIES_ARCH 68 #define PTL0_ENTRIES_ARCH 512 69 #define PTL1_ENTRIES_ARCH 512 70 #define PTL2_ENTRIES_ARCH 512 71 #define PTL3_ENTRIES_ARCH 512 83 72 84 73 /* Page table sizes for each level. */ 85 #define PTL0_SIZE_ARCH 86 #define PTL1_SIZE_ARCH 87 #define PTL2_SIZE_ARCH 88 #define PTL3_SIZE_ARCH 74 #define PTL0_SIZE_ARCH ONE_FRAME 75 #define PTL1_SIZE_ARCH ONE_FRAME 76 #define PTL2_SIZE_ARCH ONE_FRAME 77 #define PTL3_SIZE_ARCH ONE_FRAME 89 78 90 79 /* Macros calculating indices into page tables in each level. */ 91 #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 39) & 0x1ff)92 #define PTL1_INDEX_ARCH(vaddr) (((vaddr) >> 30) & 0x1ff)93 #define PTL2_INDEX_ARCH(vaddr) (((vaddr) >> 21) & 0x1ff)94 #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x1ff)80 #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 39) & 0x1ffU) 81 #define PTL1_INDEX_ARCH(vaddr) (((vaddr) >> 30) & 0x1ffU) 82 #define PTL2_INDEX_ARCH(vaddr) (((vaddr) >> 21) & 0x1ffU) 83 #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x1ffU) 95 84 96 85 /* Get PTE address accessors for each level. */ … … 156 145 #ifndef __ASM__ 157 146 147 #include <mm/mm.h> 148 #include <arch/interrupt.h> 149 #include <typedefs.h> 150 158 151 /* Page fault error codes. */ 159 152 … … 161 154 * page. 162 155 */ 163 #define PFERR_CODE_P (1 << 0)156 #define PFERR_CODE_P (1 << 0) 164 157 165 158 /** When bit on this position is 1, the page fault was caused by a write. */ 166 #define PFERR_CODE_RW 159 #define PFERR_CODE_RW (1 << 1) 167 160 168 161 /** When bit on this position is 1, the page fault was caused in user mode. */ 169 #define PFERR_CODE_US 162 #define PFERR_CODE_US (1 << 2) 170 163 171 164 /** When bit on this position is 1, a reserved bit was set in page directory. */ 172 #define PFERR_CODE_RSVD 165 #define PFERR_CODE_RSVD (1 << 3) 173 166 174 167 /** When bit on this position os 1, the page fault was caused during instruction 175 168 * fecth. 176 169 */ 177 #define PFERR_CODE_ID (1 << 4) 178 179 static inline int get_pt_flags(pte_t *pt, size_t i) 170 #define PFERR_CODE_ID (1 << 4) 171 172 /** Page Table Entry. */ 173 typedef struct { 174 unsigned int present : 1; 175 unsigned int writeable : 1; 176 unsigned int uaccessible : 1; 177 unsigned int page_write_through : 1; 178 unsigned int page_cache_disable : 1; 179 unsigned int accessed : 1; 180 unsigned int dirty : 1; 181 unsigned int unused: 1; 182 unsigned int global : 1; 183 unsigned int soft_valid : 1; /**< Valid content even if present bit is cleared. */ 184 unsigned int avl : 2; 185 unsigned int addr_12_31 : 30; 186 unsigned int addr_32_51 : 21; 187 unsigned int no_execute : 1; 188 } __attribute__ ((packed)) pte_t; 189 190 NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i) 180 191 { 181 192 pte_t *p = &pt[i]; … … 190 201 } 191 202 192 static inline void set_pt_addr(pte_t *pt, size_t i, uintptr_t a)203 NO_TRACE static inline void set_pt_addr(pte_t *pt, size_t i, uintptr_t a) 193 204 { 194 205 pte_t *p = &pt[i]; 195 196 p->addr_12_31 = (a >> 12) & 0xfffff;206 207 p->addr_12_31 = (a >> 12) & UINT32_C(0xfffff); 197 208 p->addr_32_51 = a >> 32; 198 209 } 199 210 200 static inline void set_pt_flags(pte_t *pt, size_t i, int flags)211 NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags) 201 212 { 202 213 pte_t *p = &pt[i]; … … 216 227 217 228 extern void page_arch_init(void); 218 extern void page_fault( int n, istate_t *istate);229 extern void page_fault(unsigned int, istate_t *); 219 230 220 231 #endif /* __ASM__ */
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