Changes in uspace/drv/pciintel/pci.c [fb78ae72:dc75234] in mainline
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uspace/drv/pciintel/pci.c (modified) (22 diffs)
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uspace/drv/pciintel/pci.c
rfb78ae72 rdc75234 1 1 /* 2 2 * Copyright (c) 2010 Lenka Trochtova 3 * Copyright (c) 2011 Jiri Svoboda 3 4 * All rights reserved. 4 5 * … … 44 45 #include <ctype.h> 45 46 #include <macros.h> 46 47 #include <driver.h> 47 #include <str_error.h> 48 49 #include <ddf/driver.h> 48 50 #include <devman.h> 49 51 #include <ipc/devman.h> … … 57 59 #include <ddi.h> 58 60 #include <libarch/ddi.h> 61 #include <pci_dev_iface.h> 59 62 60 63 #include "pci.h" … … 65 68 ((1 << 31) | (bus << 16) | (dev << 11) | (fn << 8) | (reg & ~3)) 66 69 67 static hw_resource_list_t *pciintel_get_child_resources(device_t *dev) 68 { 69 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 70 71 if (dev_data == NULL) 70 /** Obtain PCI function soft-state from DDF function node */ 71 #define PCI_FUN(fnode) ((pci_fun_t *) (fnode)->driver_data) 72 73 /** Obtain PCI bus soft-state from DDF device node */ 74 #define PCI_BUS(dnode) ((pci_bus_t *) (dnode)->driver_data) 75 76 /** Obtain PCI bus soft-state from function soft-state */ 77 #define PCI_BUS_FROM_FUN(fun) ((fun)->busptr) 78 79 static hw_resource_list_t *pciintel_get_resources(ddf_fun_t *fnode) 80 { 81 pci_fun_t *fun = PCI_FUN(fnode); 82 83 if (fun == NULL) 72 84 return NULL; 73 return & dev_data->hw_resources;74 } 75 76 static bool pciintel_enable_ child_interrupt(device_t *dev)85 return &fun->hw_resources; 86 } 87 88 static bool pciintel_enable_interrupt(ddf_fun_t *fnode) 77 89 { 78 90 /* This is an old ugly way, copied from ne2000 driver */ 79 assert( dev);80 pci_ dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data;91 assert(fnode); 92 pci_fun_t *dev_data = (pci_fun_t *) fnode->driver_data; 81 93 82 94 sysarg_t apic; 83 95 sysarg_t i8259; 96 84 97 int irc_phone = -1; 85 98 int irc_service = 0; … … 91 104 } 92 105 93 if (irc_service) { 94 while (irc_phone < 0) 95 irc_phone = service_connect_blocking(irc_service, 0, 0); 96 } else { 106 if (irc_service == 0) 97 107 return false; 98 } 108 109 irc_phone = service_connect_blocking(irc_service, 0, 0); 110 if (irc_phone < 0) 111 return false; 99 112 100 113 size_t i; … … 102 115 if (dev_data->hw_resources.resources[i].type == INTERRUPT) { 103 116 int irq = dev_data->hw_resources.resources[i].res.interrupt.irq; 104 async_msg_1(irc_phone, IRC_ENABLE_INTERRUPT, irq); 117 int rc = async_req_1_0(irc_phone, IRC_ENABLE_INTERRUPT, irq); 118 if (rc != EOK) { 119 async_hangup(irc_phone); 120 return false; 121 } 105 122 } 106 123 } … … 110 127 } 111 128 112 static hw_res_ops_t pciintel_child_hw_res_ops = { 113 &pciintel_get_child_resources, 114 &pciintel_enable_child_interrupt 129 static int pci_config_space_write_16(ddf_fun_t *fun, uint32_t address, uint16_t data) 130 { 131 if (address > 254) 132 return EINVAL; 133 pci_conf_write_16(PCI_FUN(fun), address, data); 134 return EOK; 135 } 136 137 138 static hw_res_ops_t pciintel_hw_res_ops = { 139 &pciintel_get_resources, 140 &pciintel_enable_interrupt 115 141 }; 116 142 117 static device_ops_t pci_child_ops; 118 119 static int pci_add_device(device_t *); 120 121 /** The pci bus driver's standard operations. */ 143 static pci_dev_iface_t pci_dev_ops = { 144 .config_space_read_8 = NULL, 145 .config_space_read_16 = NULL, 146 .config_space_read_32 = NULL, 147 .config_space_write_8 = NULL, 148 .config_space_write_16 = &pci_config_space_write_16, 149 .config_space_write_32 = NULL 150 }; 151 152 static ddf_dev_ops_t pci_fun_ops = { 153 .interfaces[HW_RES_DEV_IFACE] = &pciintel_hw_res_ops, 154 .interfaces[PCI_DEV_IFACE] = &pci_dev_ops 155 }; 156 157 static int pci_add_device(ddf_dev_t *); 158 159 /** PCI bus driver standard operations */ 122 160 static driver_ops_t pci_ops = { 123 161 .add_device = &pci_add_device 124 162 }; 125 163 126 /** The pci bus driver structure.*/164 /** PCI bus driver structure */ 127 165 static driver_t pci_driver = { 128 166 .name = NAME, … … 130 168 }; 131 169 132 typedef struct pciintel_bus_data { 133 uint32_t conf_io_addr; 134 void *conf_data_port; 135 void *conf_addr_port; 136 fibril_mutex_t conf_mutex; 137 } pci_bus_data_t; 138 139 static pci_bus_data_t *create_pci_bus_data(void) 140 { 141 pci_bus_data_t *bus_data; 142 143 bus_data = (pci_bus_data_t *) malloc(sizeof(pci_bus_data_t)); 144 if (bus_data != NULL) { 145 memset(bus_data, 0, sizeof(pci_bus_data_t)); 146 fibril_mutex_initialize(&bus_data->conf_mutex); 147 } 148 149 return bus_data; 150 } 151 152 static void delete_pci_bus_data(pci_bus_data_t *bus_data) 153 { 154 free(bus_data); 155 } 156 157 static void pci_conf_read(device_t *dev, int reg, uint8_t *buf, size_t len) 158 { 159 assert(dev->parent != NULL); 160 161 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 162 pci_bus_data_t *bus_data = (pci_bus_data_t *) dev->parent->driver_data; 163 164 fibril_mutex_lock(&bus_data->conf_mutex); 170 static pci_bus_t *pci_bus_new(void) 171 { 172 pci_bus_t *bus; 173 174 bus = (pci_bus_t *) calloc(1, sizeof(pci_bus_t)); 175 if (bus == NULL) 176 return NULL; 177 178 fibril_mutex_initialize(&bus->conf_mutex); 179 return bus; 180 } 181 182 static void pci_bus_delete(pci_bus_t *bus) 183 { 184 assert(bus != NULL); 185 free(bus); 186 } 187 188 static void pci_conf_read(pci_fun_t *fun, int reg, uint8_t *buf, size_t len) 189 { 190 pci_bus_t *bus = PCI_BUS_FROM_FUN(fun); 191 192 fibril_mutex_lock(&bus->conf_mutex); 165 193 166 194 uint32_t conf_addr; 167 conf_addr = CONF_ADDR( dev_data->bus, dev_data->dev, dev_data->fn, reg);168 void *addr = bus _data->conf_data_port + (reg & 3);169 170 pio_write_32(bus _data->conf_addr_port, conf_addr);195 conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg); 196 void *addr = bus->conf_data_port + (reg & 3); 197 198 pio_write_32(bus->conf_addr_port, conf_addr); 171 199 172 200 switch (len) { … … 182 210 } 183 211 184 fibril_mutex_unlock(&bus_data->conf_mutex); 185 } 186 187 static void pci_conf_write(device_t *dev, int reg, uint8_t *buf, size_t len) 188 { 189 assert(dev->parent != NULL); 190 191 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 192 pci_bus_data_t *bus_data = (pci_bus_data_t *) dev->parent->driver_data; 193 194 fibril_mutex_lock(&bus_data->conf_mutex); 212 fibril_mutex_unlock(&bus->conf_mutex); 213 } 214 215 static void pci_conf_write(pci_fun_t *fun, int reg, uint8_t *buf, size_t len) 216 { 217 pci_bus_t *bus = PCI_BUS_FROM_FUN(fun); 218 219 fibril_mutex_lock(&bus->conf_mutex); 195 220 196 221 uint32_t conf_addr; 197 conf_addr = CONF_ADDR( dev_data->bus, dev_data->dev, dev_data->fn, reg);198 void *addr = bus _data->conf_data_port + (reg & 3);199 200 pio_write_32(bus _data->conf_addr_port, conf_addr);222 conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg); 223 void *addr = bus->conf_data_port + (reg & 3); 224 225 pio_write_32(bus->conf_addr_port, conf_addr); 201 226 202 227 switch (len) { … … 212 237 } 213 238 214 fibril_mutex_unlock(&bus _data->conf_mutex);215 } 216 217 uint8_t pci_conf_read_8( device_t *dev, int reg)239 fibril_mutex_unlock(&bus->conf_mutex); 240 } 241 242 uint8_t pci_conf_read_8(pci_fun_t *fun, int reg) 218 243 { 219 244 uint8_t res; 220 pci_conf_read( dev, reg, &res, 1);245 pci_conf_read(fun, reg, &res, 1); 221 246 return res; 222 247 } 223 248 224 uint16_t pci_conf_read_16( device_t *dev, int reg)249 uint16_t pci_conf_read_16(pci_fun_t *fun, int reg) 225 250 { 226 251 uint16_t res; 227 pci_conf_read( dev, reg, (uint8_t *) &res, 2);252 pci_conf_read(fun, reg, (uint8_t *) &res, 2); 228 253 return res; 229 254 } 230 255 231 uint32_t pci_conf_read_32( device_t *dev, int reg)256 uint32_t pci_conf_read_32(pci_fun_t *fun, int reg) 232 257 { 233 258 uint32_t res; 234 pci_conf_read( dev, reg, (uint8_t *) &res, 4);259 pci_conf_read(fun, reg, (uint8_t *) &res, 4); 235 260 return res; 236 261 } 237 262 238 void pci_conf_write_8(device_t *dev, int reg, uint8_t val) 239 { 240 pci_conf_write(dev, reg, (uint8_t *) &val, 1); 241 } 242 243 void pci_conf_write_16(device_t *dev, int reg, uint16_t val) 244 { 245 pci_conf_write(dev, reg, (uint8_t *) &val, 2); 246 } 247 248 void pci_conf_write_32(device_t *dev, int reg, uint32_t val) 249 { 250 pci_conf_write(dev, reg, (uint8_t *) &val, 4); 251 } 252 253 void create_pci_match_ids(device_t *dev) 254 { 255 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 256 match_id_t *match_id = NULL; 263 void pci_conf_write_8(pci_fun_t *fun, int reg, uint8_t val) 264 { 265 pci_conf_write(fun, reg, (uint8_t *) &val, 1); 266 } 267 268 void pci_conf_write_16(pci_fun_t *fun, int reg, uint16_t val) 269 { 270 pci_conf_write(fun, reg, (uint8_t *) &val, 2); 271 } 272 273 void pci_conf_write_32(pci_fun_t *fun, int reg, uint32_t val) 274 { 275 pci_conf_write(fun, reg, (uint8_t *) &val, 4); 276 } 277 278 void pci_fun_create_match_ids(pci_fun_t *fun) 279 { 257 280 char *match_id_str; 258 259 match_id = create_match_id(); 260 if (match_id != NULL) { 261 asprintf(&match_id_str, "pci/ven=%04x&dev=%04x", 262 dev_data->vendor_id, dev_data->device_id); 263 match_id->id = match_id_str; 264 match_id->score = 90; 265 add_match_id(&dev->match_ids, match_id); 266 } 267 281 int rc; 282 283 asprintf(&match_id_str, "pci/ven=%04x&dev=%04x", 284 fun->vendor_id, fun->device_id); 285 286 if (match_id_str == NULL) { 287 printf(NAME ": out of memory creating match ID.\n"); 288 return; 289 } 290 291 rc = ddf_fun_add_match_id(fun->fnode, match_id_str, 90); 292 if (rc != EOK) { 293 printf(NAME ": error adding match ID: %s\n", 294 str_error(rc)); 295 } 296 268 297 /* TODO add more ids (with subsys ids, using class id etc.) */ 269 298 } 270 299 271 void 272 pci_add_range(device_t *dev, uint64_t range_addr, size_t range_size, bool io) 273 { 274 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 275 hw_resource_list_t *hw_res_list = &dev_data->hw_resources; 300 void pci_add_range(pci_fun_t *fun, uint64_t range_addr, size_t range_size, 301 bool io) 302 { 303 hw_resource_list_t *hw_res_list = &fun->hw_resources; 276 304 hw_resource_t *hw_resources = hw_res_list->resources; 277 305 size_t count = hw_res_list->count; … … 298 326 * address add it to the devices hw resource list. 299 327 * 300 * @param dev The pci device.328 * @param fun PCI function 301 329 * @param addr The address of the BAR in the PCI configuration address space of 302 * the device .303 * @return The addr the address of the BAR which should be read next .330 * the device 331 * @return The addr the address of the BAR which should be read next 304 332 */ 305 int pci_read_bar( device_t *dev, int addr)306 { 333 int pci_read_bar(pci_fun_t *fun, int addr) 334 { 307 335 /* Value of the BAR */ 308 336 uint32_t val, mask; … … 318 346 319 347 /* Get the value of the BAR. */ 320 val = pci_conf_read_32(dev, addr); 348 val = pci_conf_read_32(fun, addr); 349 350 #define IO_MASK (~0x3) 351 #define MEM_MASK (~0xf) 321 352 322 353 io = (bool) (val & 1); 323 354 if (io) { 324 355 addrw64 = false; 356 mask = IO_MASK; 325 357 } else { 358 mask = MEM_MASK; 326 359 switch ((val >> 1) & 3) { 327 360 case 0: … … 338 371 339 372 /* Get the address mask. */ 340 pci_conf_write_32( dev, addr, 0xffffffff);341 mask = pci_conf_read_32(dev, addr);373 pci_conf_write_32(fun, addr, 0xffffffff); 374 mask &= pci_conf_read_32(fun, addr); 342 375 343 376 /* Restore the original value. */ 344 pci_conf_write_32( dev, addr, val);345 val = pci_conf_read_32( dev, addr);377 pci_conf_write_32(fun, addr, val); 378 val = pci_conf_read_32(fun, addr); 346 379 347 380 range_size = pci_bar_mask_to_size(mask); 348 381 349 382 if (addrw64) { 350 range_addr = ((uint64_t)pci_conf_read_32( dev, addr + 4) << 32) |383 range_addr = ((uint64_t)pci_conf_read_32(fun, addr + 4) << 32) | 351 384 (val & 0xfffffff0); 352 385 } else { … … 355 388 356 389 if (range_addr != 0) { 357 printf(NAME ": device %s : ", dev->name);390 printf(NAME ": function %s : ", fun->fnode->name); 358 391 printf("address = %" PRIx64, range_addr); 359 392 printf(", size = %x\n", (unsigned int) range_size); 360 393 } 361 394 362 pci_add_range( dev, range_addr, range_size, io);395 pci_add_range(fun, range_addr, range_size, io); 363 396 364 397 if (addrw64) … … 368 401 } 369 402 370 void pci_add_interrupt(device_t *dev, int irq) 371 { 372 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 373 hw_resource_list_t *hw_res_list = &dev_data->hw_resources; 403 void pci_add_interrupt(pci_fun_t *fun, int irq) 404 { 405 hw_resource_list_t *hw_res_list = &fun->hw_resources; 374 406 hw_resource_t *hw_resources = hw_res_list->resources; 375 407 size_t count = hw_res_list->count; … … 383 415 hw_res_list->count++; 384 416 385 printf(NAME ": device %s uses irq %x.\n", dev->name, irq);386 } 387 388 void pci_read_interrupt( device_t *dev)389 { 390 uint8_t irq = pci_conf_read_8( dev, PCI_BRIDGE_INT_LINE);417 printf(NAME ": function %s uses irq %x.\n", fun->fnode->name, irq); 418 } 419 420 void pci_read_interrupt(pci_fun_t *fun) 421 { 422 uint8_t irq = pci_conf_read_8(fun, PCI_BRIDGE_INT_LINE); 391 423 if (irq != 0xff) 392 pci_add_interrupt( dev, irq);424 pci_add_interrupt(fun, irq); 393 425 } 394 426 395 427 /** Enumerate (recursively) and register the devices connected to a pci bus. 396 428 * 397 * @param parent The host-to-pci bridge device.398 * @param bus_num The bus number.429 * @param bus Host-to-PCI bridge 430 * @param bus_num Bus number 399 431 */ 400 void pci_bus_scan(device_t *parent, int bus_num) 401 { 402 device_t *dev = create_device(); 403 pci_dev_data_t *dev_data = create_pci_dev_data(); 404 dev->driver_data = dev_data; 405 dev->parent = parent; 432 void pci_bus_scan(pci_bus_t *bus, int bus_num) 433 { 434 ddf_fun_t *fnode; 435 pci_fun_t *fun; 406 436 407 437 int child_bus = 0; 408 438 int dnum, fnum; 409 439 bool multi; 410 uint8_t header_type; 440 uint8_t header_type; 441 442 fun = pci_fun_new(bus); 411 443 412 444 for (dnum = 0; dnum < 32; dnum++) { 413 445 multi = true; 414 446 for (fnum = 0; multi && fnum < 8; fnum++) { 415 init_pci_dev_data(dev_data, bus_num, dnum, fnum);416 dev_data->vendor_id = pci_conf_read_16(dev,447 pci_fun_init(fun, bus_num, dnum, fnum); 448 fun->vendor_id = pci_conf_read_16(fun, 417 449 PCI_VENDOR_ID); 418 dev_data->device_id = pci_conf_read_16(dev,450 fun->device_id = pci_conf_read_16(fun, 419 451 PCI_DEVICE_ID); 420 if ( dev_data->vendor_id == 0xffff) {452 if (fun->vendor_id == 0xffff) { 421 453 /* 422 454 * The device is not present, go on scanning the … … 429 461 } 430 462 431 header_type = pci_conf_read_8( dev, PCI_HEADER_TYPE);463 header_type = pci_conf_read_8(fun, PCI_HEADER_TYPE); 432 464 if (fnum == 0) { 433 465 /* Is the device multifunction? */ … … 437 469 header_type = header_type & 0x7F; 438 470 439 create_pci_dev_name(dev); 440 441 pci_alloc_resource_list(dev); 442 pci_read_bars(dev); 443 pci_read_interrupt(dev); 444 445 dev->ops = &pci_child_ops; 446 447 printf(NAME ": adding new child device %s.\n", 448 dev->name); 449 450 create_pci_match_ids(dev); 451 452 if (child_device_register(dev, parent) != EOK) { 453 pci_clean_resource_list(dev); 454 clean_match_ids(&dev->match_ids); 455 free((char *) dev->name); 456 dev->name = NULL; 471 char *fun_name = pci_fun_create_name(fun); 472 if (fun_name == NULL) { 473 printf(NAME ": out of memory.\n"); 474 return; 475 } 476 477 fnode = ddf_fun_create(bus->dnode, fun_inner, fun_name); 478 if (fnode == NULL) { 479 printf(NAME ": error creating function.\n"); 480 return; 481 } 482 483 free(fun_name); 484 fun->fnode = fnode; 485 486 pci_alloc_resource_list(fun); 487 pci_read_bars(fun); 488 pci_read_interrupt(fun); 489 490 fnode->ops = &pci_fun_ops; 491 fnode->driver_data = fun; 492 493 printf(NAME ": adding new function %s.\n", 494 fnode->name); 495 496 pci_fun_create_match_ids(fun); 497 498 if (ddf_fun_bind(fnode) != EOK) { 499 pci_clean_resource_list(fun); 500 clean_match_ids(&fnode->match_ids); 501 free((char *) fnode->name); 502 fnode->name = NULL; 457 503 continue; 458 504 } … … 460 506 if (header_type == PCI_HEADER_TYPE_BRIDGE || 461 507 header_type == PCI_HEADER_TYPE_CARDBUS) { 462 child_bus = pci_conf_read_8( dev,508 child_bus = pci_conf_read_8(fun, 463 509 PCI_BRIDGE_SEC_BUS_NUM); 464 510 printf(NAME ": device is pci-to-pci bridge, " 465 511 "secondary bus number = %d.\n", bus_num); 466 512 if (child_bus > bus_num) 467 pci_bus_scan( parent, child_bus);513 pci_bus_scan(bus, child_bus); 468 514 } 469 515 470 /* Alloc new aux. dev. structure. */ 471 dev = create_device(); 472 dev_data = create_pci_dev_data(); 473 dev->driver_data = dev_data; 474 dev->parent = parent; 516 fun = pci_fun_new(bus); 475 517 } 476 518 } 477 519 478 if (dev_data->vendor_id == 0xffff) { 479 delete_device(dev); 480 /* Free the auxiliary device structure. */ 481 delete_pci_dev_data(dev_data); 482 } 483 } 484 485 static int pci_add_device(device_t *dev) 486 { 520 if (fun->vendor_id == 0xffff) { 521 /* Free the auxiliary function structure. */ 522 pci_fun_delete(fun); 523 } 524 } 525 526 static int pci_add_device(ddf_dev_t *dnode) 527 { 528 pci_bus_t *bus = NULL; 529 ddf_fun_t *ctl = NULL; 530 bool got_res = false; 487 531 int rc; 488 532 489 533 printf(NAME ": pci_add_device\n"); 490 491 pci_bus_data_t *bus_data = create_pci_bus_data(); 492 if (bus_data == NULL) { 534 dnode->parent_phone = -1; 535 536 bus = pci_bus_new(); 537 if (bus == NULL) { 493 538 printf(NAME ": pci_add_device allocation failed.\n"); 494 return ENOMEM; 495 } 496 497 dev->parent_phone = devman_parent_device_connect(dev->handle, 539 rc = ENOMEM; 540 goto fail; 541 } 542 bus->dnode = dnode; 543 dnode->driver_data = bus; 544 545 dnode->parent_phone = devman_parent_device_connect(dnode->handle, 498 546 IPC_FLAG_BLOCKING); 499 if (d ev->parent_phone < 0) {547 if (dnode->parent_phone < 0) { 500 548 printf(NAME ": pci_add_device failed to connect to the " 501 549 "parent's driver.\n"); 502 delete_pci_bus_data(bus_data);503 return dev->parent_phone;550 rc = dnode->parent_phone; 551 goto fail; 504 552 } 505 553 506 554 hw_resource_list_t hw_resources; 507 555 508 rc = hw_res_get_resource_list(d ev->parent_phone, &hw_resources);556 rc = hw_res_get_resource_list(dnode->parent_phone, &hw_resources); 509 557 if (rc != EOK) { 510 558 printf(NAME ": pci_add_device failed to get hw resources for " 511 559 "the device.\n"); 512 delete_pci_bus_data(bus_data); 513 async_hangup(dev->parent_phone); 514 return rc; 515 } 560 goto fail; 561 } 562 got_res = true; 516 563 517 564 printf(NAME ": conf_addr = %" PRIx64 ".\n", … … 522 569 assert(hw_resources.resources[0].res.io_range.size == 8); 523 570 524 bus _data->conf_io_addr =571 bus->conf_io_addr = 525 572 (uint32_t) hw_resources.resources[0].res.io_range.address; 526 573 527 if (pio_enable((void *)(uintptr_t)bus _data->conf_io_addr, 8,528 &bus _data->conf_addr_port)) {574 if (pio_enable((void *)(uintptr_t)bus->conf_io_addr, 8, 575 &bus->conf_addr_port)) { 529 576 printf(NAME ": failed to enable configuration ports.\n"); 530 delete_pci_bus_data(bus_data); 531 async_hangup(dev->parent_phone); 577 rc = EADDRNOTAVAIL; 578 goto fail; 579 } 580 bus->conf_data_port = (char *) bus->conf_addr_port + 4; 581 582 /* Make the bus device more visible. It has no use yet. */ 583 printf(NAME ": adding a 'ctl' function\n"); 584 585 ctl = ddf_fun_create(bus->dnode, fun_exposed, "ctl"); 586 if (ctl == NULL) { 587 printf(NAME ": error creating control function.\n"); 588 rc = ENOMEM; 589 goto fail; 590 } 591 592 rc = ddf_fun_bind(ctl); 593 if (rc != EOK) { 594 printf(NAME ": error binding control function.\n"); 595 goto fail; 596 } 597 598 /* Enumerate functions. */ 599 printf(NAME ": scanning the bus\n"); 600 pci_bus_scan(bus, 0); 601 602 hw_res_clean_resource_list(&hw_resources); 603 604 return EOK; 605 606 fail: 607 if (bus != NULL) 608 pci_bus_delete(bus); 609 if (dnode->parent_phone >= 0) 610 async_hangup(dnode->parent_phone); 611 if (got_res) 532 612 hw_res_clean_resource_list(&hw_resources); 533 return EADDRNOTAVAIL; 534 } 535 bus_data->conf_data_port = (char *) bus_data->conf_addr_port + 4; 536 537 dev->driver_data = bus_data; 538 539 /* Enumerate child devices. */ 540 printf(NAME ": scanning the bus\n"); 541 pci_bus_scan(dev, 0); 542 543 hw_res_clean_resource_list(&hw_resources); 544 545 return EOK; 613 if (ctl != NULL) 614 ddf_fun_destroy(ctl); 615 616 return rc; 546 617 } 547 618 548 619 static void pciintel_init(void) 549 620 { 550 pci_child_ops.interfaces[HW_RES_DEV_IFACE] = &pciintel_child_hw_res_ops; 551 } 552 553 pci_dev_data_t *create_pci_dev_data(void) 554 { 555 pci_dev_data_t *res = (pci_dev_data_t *) malloc(sizeof(pci_dev_data_t)); 556 557 if (res != NULL) 558 memset(res, 0, sizeof(pci_dev_data_t)); 559 return res; 560 } 561 562 void init_pci_dev_data(pci_dev_data_t *dev_data, int bus, int dev, int fn) 563 { 564 dev_data->bus = bus; 565 dev_data->dev = dev; 566 dev_data->fn = fn; 567 } 568 569 void delete_pci_dev_data(pci_dev_data_t *dev_data) 570 { 571 if (dev_data != NULL) { 572 hw_res_clean_resource_list(&dev_data->hw_resources); 573 free(dev_data); 574 } 575 } 576 577 void create_pci_dev_name(device_t *dev) 578 { 579 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 621 pci_fun_ops.interfaces[HW_RES_DEV_IFACE] = &pciintel_hw_res_ops; 622 pci_fun_ops.interfaces[PCI_DEV_IFACE] = &pci_dev_ops; 623 } 624 625 pci_fun_t *pci_fun_new(pci_bus_t *bus) 626 { 627 pci_fun_t *fun; 628 629 fun = (pci_fun_t *) calloc(1, sizeof(pci_fun_t)); 630 if (fun == NULL) 631 return NULL; 632 633 fun->busptr = bus; 634 return fun; 635 } 636 637 void pci_fun_init(pci_fun_t *fun, int bus, int dev, int fn) 638 { 639 fun->bus = bus; 640 fun->dev = dev; 641 fun->fn = fn; 642 } 643 644 void pci_fun_delete(pci_fun_t *fun) 645 { 646 assert(fun != NULL); 647 hw_res_clean_resource_list(&fun->hw_resources); 648 free(fun); 649 } 650 651 char *pci_fun_create_name(pci_fun_t *fun) 652 { 580 653 char *name = NULL; 581 654 582 asprintf(&name, "%02x:%02x.%01x", dev_data->bus, dev_data->dev, 583 dev_data->fn); 584 dev->name = name; 585 } 586 587 bool pci_alloc_resource_list(device_t *dev) 588 { 589 pci_dev_data_t *dev_data = (pci_dev_data_t *)dev->driver_data; 590 591 dev_data->hw_resources.resources = 655 asprintf(&name, "%02x:%02x.%01x", fun->bus, fun->dev, 656 fun->fn); 657 return name; 658 } 659 660 bool pci_alloc_resource_list(pci_fun_t *fun) 661 { 662 fun->hw_resources.resources = 592 663 (hw_resource_t *) malloc(PCI_MAX_HW_RES * sizeof(hw_resource_t)); 593 return dev_data->hw_resources.resources != NULL; 594 } 595 596 void pci_clean_resource_list(device_t *dev) 597 { 598 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 599 600 if (dev_data->hw_resources.resources != NULL) { 601 free(dev_data->hw_resources.resources); 602 dev_data->hw_resources.resources = NULL; 603 } 604 } 605 606 /** Read the base address registers (BARs) of the device and adds the addresses 607 * to its hw resource list. 664 return fun->hw_resources.resources != NULL; 665 } 666 667 void pci_clean_resource_list(pci_fun_t *fun) 668 { 669 if (fun->hw_resources.resources != NULL) { 670 free(fun->hw_resources.resources); 671 fun->hw_resources.resources = NULL; 672 } 673 } 674 675 /** Read the base address registers (BARs) of the function and add the addresses 676 * to its HW resource list. 608 677 * 609 * @param dev the pci device.678 * @param fun PCI function 610 679 */ 611 void pci_read_bars( device_t *dev)680 void pci_read_bars(pci_fun_t *fun) 612 681 { 613 682 /* … … 618 687 619 688 while (addr <= PCI_BASE_ADDR_5) 620 addr = pci_read_bar( dev, addr);689 addr = pci_read_bar(fun, addr); 621 690 } 622 691 623 692 size_t pci_bar_mask_to_size(uint32_t mask) 624 693 { 625 return ((mask & 0xfffffff0) ^ 0xffffffff) + 1; 694 size_t size = mask & ~(mask - 1); 695 return size; 626 696 } 627 697 … … 630 700 printf(NAME ": HelenOS pci bus driver (intel method 1).\n"); 631 701 pciintel_init(); 632 return d river_main(&pci_driver);702 return ddf_driver_main(&pci_driver); 633 703 } 634 704
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