Changeset dd0c8a0 in mainline for uspace/lib/c/arch/amd64/src/fibril.S

Timestamp:

2013-09-29T06:56:33Z (12 years ago)

Author:

Beniamino Galvani <b.galvani@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

a9bd960d

Parents:

3deb0155 (diff), 13be2583 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge mainline changes.

File:

• uspace/lib/c/arch/amd64/src/fibril.S (modified) (2 diffs)

uspace/lib/c/arch/amd64/src/fibril.S

@@ -42 +42 @@
         movq (%rsp), %rdx     # the caller's return %eip
         
-        # In %edi is passed 1st argument
+        # in %edi is passed 1st argument
         CONTEXT_SAVE_ARCH_CORE %rdi %rdx 
         
-        # Save TLS
+        # save TLS
         movq %fs:0, %rax
         movq %rax, OFFSET_TLS(%rdi)
-                
-        xorl %eax, %eax         # context_save returns 1
+        
+        xorl %eax, %eax       # context_save returns 1
         incl %eax
         ret
-
 
 ## Restore current CPU context
@@ -64 +63 @@
         
         movq %rdx,(%rsp)
-
+        
         # Set thread local storage
-        movq OFFSET_TLS(%rdi), %rdi   # Set arg1 to TLS addr
-        movl $1, %eax           # SYS_TLS_SET
+        movq OFFSET_TLS(%rdi), %rdi  # Set arg1 to TLS addr
+        movl $1, %eax                # SYS_TLS_SET
         syscall
-
-        xorl %eax, %eax         # context_restore returns 0
+        
+        xorl %eax, %eax              # context_restore returns 0
         ret