Changeset de7663f in mainline for boot/arch/arm32/loader/mm.h

Timestamp:

2007-06-13T18:39:31Z (17 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

341140c

Parents:

c03ee1c

Message:

Remove some forgotten \r from arm32 files.
Formatting changes.
Add some correct BOOT_mips32_* guards.

File:

• boot/arch/arm32/loader/mm.h (modified) (6 diffs)

boot/arch/arm32/loader/mm.h

@@ -1 +1 @@
 /*
- * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
+ * Copyright (c) 2007 Pavel Jancik
+ * Copyright (c) 2007 Michal Kebrt
  * All rights reserved.
  *
@@ -34 +35 @@
  *  @brief Memory management used while booting the kernel.
  *
- *  So called "section" paging is used while booting the kernel. The term "section"
- *  comes from the ARM architecture specification and stands for the following:
- *  one-level paging, 1MB sized pages, 4096 entries in the page table.
+ *  So called "section" paging is used while booting the kernel. The term
+ *  "section" comes from the ARM architecture specification and stands for the
+ *  following: one-level paging, 1MB sized pages, 4096 entries in the page
+ *  table.
  */ 
 
@@ -50 +52 @@
 
 /** Frame width. */
-#define FRAME_WIDTH                 20
+#define FRAME_WIDTH                     20
 
 /** Frame size. */
-#define FRAME_SIZE                  (1 << FRAME_WIDTH)
+#define FRAME_SIZE                      (1 << FRAME_WIDTH)
 
-/** Page size in 2-level paging which is switched on later after the kernel initialization. */
-#define KERNEL_PAGE_SIZE            (1 << 12)
+/** Page size in 2-level paging which is switched on later after the kernel
+ * initialization.
+ */
+#define KERNEL_PAGE_SIZE                (1 << 12)
 
 
 #ifndef __ASM__
 /** Converts kernel address to physical address. */
-#       define KA2PA(x)                 (((uintptr_t) (x)) - 0x80000000)
+#       define KA2PA(x)                 (((uintptr_t) (x)) - 0x80000000)
 /** Converts physical address to kernel address. */
-#       define PA2KA(x)                 (((uintptr_t) (x)) + 0x80000000)
+#       define PA2KA(x)                 (((uintptr_t) (x)) + 0x80000000)
 #else
-#       define KA2PA(x)                 ((x) - 0x80000000)
-#       define PA2KA(x)                 ((x) + 0x80000000)
+#       define KA2PA(x)                 ((x) - 0x80000000)
+#       define PA2KA(x)                 ((x) + 0x80000000)
 #endif
 
 
 /** Number of entries in PTL0. */
-#define PTL0_ENTRIES                (1<<12)                             /* 4096 */
+#define PTL0_ENTRIES                    (1 << 12)       /* 4096 */
 
 /** Size of an entry in PTL0. */
-#define PTL0_ENTRY_SIZE             4
+#define PTL0_ENTRY_SIZE                 4
 
 /** Returns number of frame the address belongs to. */
-#define ADDR2PFN( addr )            ( ((uintptr_t)(addr)) >> FRAME_WIDTH )
+#define ADDR2PFN(addr)                  (((uintptr_t) (addr)) >> FRAME_WIDTH)
 
 /** Describes "section" page table entry (one-level paging with 1MB sized pages). */  
-#define PTE_DESCRIPTOR_SECTION      0x2
+#define PTE_DESCRIPTOR_SECTION          0x2
 
 /** Page table access rights: user - no access, kernel - read/write. */
-#define PTE_AP_USER_NO_KERNEL_RW    0x1
+#define PTE_AP_USER_NO_KERNEL_RW        0x1
 
 
@@ -89 +93 @@
 
 
-/** Page table level 0 entry - "section" format is used (one-level paging, 1MB sized
- * pages). Used only while booting the kernel. 
+/** Page table level 0 entry - "section" format is used (one-level paging, 1MB
+ * sized pages). Used only while booting the kernel. 
  */
 typedef struct {
-        unsigned descriptor_type     : 2;
-        unsigned bufferable          : 1;
-        unsigned cacheable           : 1; 
-        unsigned impl_specific       : 1;
-        unsigned domain              : 4;
-        unsigned should_be_zero_1    : 1;
-        unsigned access_permission   : 2;       
-        unsigned should_be_zero_2    : 8;
-        unsigned section_base_addr   : 12;
+        unsigned descriptor_type : 2;
+        unsigned bufferable : 1;
+        unsigned cacheable : 1; 
+        unsigned impl_specific : 1;
+        unsigned domain : 4;
+        unsigned should_be_zero_1 : 1;
+        unsigned access_permission : 2;         
+        unsigned should_be_zero_2 : 8;
+        unsigned section_base_addr : 12;
 } __attribute__ ((packed)) pte_level0_section_t;
 
 
-/** Page table that holds 1:1 virtual to physical mapping used while booting the kernel. */ 
+/** Page table that holds 1:1 virtual to physical mapping used while booting the
+ * kernel.
+ */ 
 extern pte_level0_section_t page_table[PTL0_ENTRIES];
 
@@ -118 +124 @@
          */
         asm volatile (
-                // behave as a client of domains
-                "ldr r0, =0x55555555       \n"
-                "mcr p15, 0, r0, c3, c0, 0 \n" 
+                /* behave as a client of domains */
+                "ldr r0, =0x55555555\n"
+                "mcr p15, 0, r0, c3, c0, 0\n" 
 
-                // current settings
-                "mrc p15, 0, r0, c1, c0, 0 \n"
+                /* current settings */
+                "mrc p15, 0, r0, c1, c0, 0\n"
 
-                // mask to enable paging
-                "ldr r1, =0x00000001       \n"
-                "orr r0, r0, r1            \n"
+                /* mask to enable paging */
+                "ldr r1, =0x00000001\n"
+                "orr r0, r0, r1\n"
 
-                // store settings
-                "mcr p15, 0, r0, c1, c0, 0 \n"
+                /* store settings */
+                "mcr p15, 0, r0, c1, c0, 0\n"
                 :
                 :
@@ -144 +150 @@
 static inline void set_ptl0_address(pte_level0_section_t* pt)
 {
-    asm volatile (
-                "mcr p15, 0, %0, c2, c0, 0 \n"
+        asm volatile (
+                "mcr p15, 0, %0, c2, c0, 0\n"
                 :
-                : "r"(pt)
-    );
+                : "r" (pt)
+        );
 }