Changes in kernel/arch/ia32/include/arch/mm/page.h [cd76bbd5:de96d3b] in mainline

File:

• kernel/arch/ia32/include/arch/mm/page.h (modified) (2 diffs)

kernel/arch/ia32/include/arch/mm/page.h

@@ -190 +190 @@
             p->writeable << PAGE_WRITE_SHIFT |
             1 << PAGE_EXEC_SHIFT |
-            p->global << PAGE_GLOBAL_SHIFT);
+            p->global << PAGE_GLOBAL_SHIFT |
+            p->page_write_through << PAGE_WRITE_COMBINE_SHIFT);
 }
 
@@ -197 +198 @@
         pte_t *p = &pt[i];
 
-        p->page_cache_disable = !(flags & PAGE_CACHEABLE);
         p->present = !(flags & PAGE_NOT_PRESENT);
         p->uaccessible = (flags & PAGE_USER) != 0;
         p->writeable = (flags & PAGE_WRITE) != 0;
         p->global = (flags & PAGE_GLOBAL) != 0;
+
+        if (flags & PAGE_WRITE_COMBINE) {
+                /* We have mapped PCD+PWT bits to write-combine mode via PAT MSR. */
+                /* (If PAT is unsupported, it will default to uncached.) */
+                p->page_cache_disable = 1;
+                p->page_write_through = 1;
+        } else {
+                p->page_cache_disable = !(flags & PAGE_CACHEABLE);
+                p->page_write_through = 0;
+        }
 
         /*