Changes in kernel/arch/sparc64/src/mm/sun4u/as.c [cd3b380:e08162b] in mainline

File:

• kernel/arch/sparc64/src/mm/sun4u/as.c (modified) (5 diffs)

kernel/arch/sparc64/src/mm/sun4u/as.c

@@ -63 +63 @@
 {
 #ifdef CONFIG_TSB
-        uintptr_t tsb_phys =
-            frame_alloc(SIZE2FRAMES((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
-            sizeof(tsb_entry_t)), flags, 0);
-        if (!tsb_phys)
+        uintptr_t tsb_base = frame_alloc(TSB_FRAMES, flags, TSB_SIZE - 1);
+        if (!tsb_base)
                 return -1;
-        
-        tsb_entry_t *tsb = (tsb_entry_t *) PA2KA(tsb_phys);
+
+        tsb_entry_t *tsb = (tsb_entry_t *) PA2KA(tsb_base);
+        memsetb(tsb, TSB_SIZE, 0);
         
         as->arch.itsb = tsb;
         as->arch.dtsb = tsb + ITSB_ENTRY_COUNT;
-        
-        memsetb(as->arch.itsb, (ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
-            sizeof(tsb_entry_t), 0);
 #endif
         
@@ -84 +80 @@
 {
 #ifdef CONFIG_TSB
-        size_t frames = SIZE2FRAMES((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
-            sizeof(tsb_entry_t));
-        frame_free(KA2PA((uintptr_t) as->arch.itsb), frames);
-        
-        return frames;
+        frame_free(KA2PA((uintptr_t) as->arch.itsb), TSB_FRAMES);
+        
+        return TSB_FRAMES;
 #else
         return 0;
@@ -136 +130 @@
         uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
         
-        ASSERT(as->arch.itsb && as->arch.dtsb);
+        ASSERT(as->arch.itsb);
+        ASSERT(as->arch.dtsb);
         
         uintptr_t tsb = (uintptr_t) as->arch.itsb;
         
-        if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
+        if (!overlaps(tsb, TSB_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
                 /*
                  * TSBs were allocated from memory not covered
@@ -155 +150 @@
          *
          */
-        tsb_base_reg_t tsb_base;
-        
-        tsb_base.value = 0;
-        tsb_base.size = TSB_SIZE;
-        tsb_base.split = 0;
-        
-        tsb_base.base = ((uintptr_t) as->arch.itsb) >> MMU_PAGE_WIDTH;
-        itsb_base_write(tsb_base.value);
-        tsb_base.base = ((uintptr_t) as->arch.dtsb) >> MMU_PAGE_WIDTH;
-        dtsb_base_write(tsb_base.value);
+        tsb_base_reg_t tsb_base_reg;
+        
+        tsb_base_reg.value = 0;
+        tsb_base_reg.size = TSB_BASE_REG_SIZE;
+        tsb_base_reg.split = 0;
+        
+        tsb_base_reg.base = ((uintptr_t) as->arch.itsb) >> MMU_PAGE_WIDTH;
+        itsb_base_write(tsb_base_reg.value);
+        tsb_base_reg.base = ((uintptr_t) as->arch.dtsb) >> MMU_PAGE_WIDTH;
+        dtsb_base_write(tsb_base_reg.value);
         
 #if defined (US3)
@@ -207 +202 @@
         uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
         
-        ASSERT(as->arch.itsb && as->arch.dtsb);
+        ASSERT(as->arch.itsb);
+        ASSERT(as->arch.dtsb);
         
         uintptr_t tsb = (uintptr_t) as->arch.itsb;
         
-        if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
+        if (!overlaps(tsb, TSB_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
                 /*
                  * TSBs were allocated from memory not covered