Changeset e11ae91 in mainline


Ignore:
Timestamp:
2006-08-30T11:31:25Z (18 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
ee454eb
Parents:
0fa6044
Message:

sparc64 work.

  • Modify before_thread_runs_arch() to store addresses of the kernel stack and

userspace window buffer, resp., to registers %g6 and %g7, resp, in the
alternate and interrupt global sets.

  • Modify after_thread_ran_arch() to sample %g7 from the alternate globals.
  • Implement trap handler for spilling register windows into userspace window buffer.
  • Implement assembly language functions to access %g6 and %g7 registers in the alternate sets.
  • Initialize the trap table so that there are now also spill_1_normal, spill_2_normal,

spill_0_other and fill_1_normal handlers. These handlers are used in different situations
and for different purposes.

Location:
kernel
Files:
7 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/sparc64/include/asm.h

    r0fa6044 re11ae91  
    322322}
    323323
    324 void cpu_halt(void);
    325 void cpu_sleep(void);
    326 void asm_delay_loop(uint32_t t);
     324extern void cpu_halt(void);
     325extern void cpu_sleep(void);
     326extern void asm_delay_loop(uint32_t t);
     327
     328extern uint64_t read_from_ag_g7(void);
     329extern void write_to_ag_g6(uint64_t val);
     330extern void write_to_ag_g7(uint64_t val);
     331extern void write_to_ig_g6(uint64_t val);
    327332
    328333#endif

  • kernel/arch/sparc64/include/context.h

    r0fa6044 re11ae91  
    5555
    5656#define context_set(c, _pc, stack, size)                                                                \
    57         (c)->pc = ((uintptr_t) _pc) - 8;                                                                \
    58         (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size), STACK_ALIGNMENT) - (STACK_BIAS + SP_DELTA);    \
     57        (c)->pc = ((uintptr_t) _pc) - 8;                                                                \
     58        (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size), STACK_ALIGNMENT) - (STACK_BIAS + SP_DELTA);    \
    5959        (c)->fp = -STACK_BIAS;                                                                          \
    6060        (c)->cleanwin = 0

  • kernel/arch/sparc64/include/trap/regwin.h

    r0fa6044 re11ae91  
    4242
    4343#define TT_CLEAN_WINDOW                 0x24
    44 #define TT_SPILL_0_NORMAL               0x80
    45 #define TT_FILL_0_NORMAL                0xc0
     44#define TT_SPILL_0_NORMAL               0x80    /* kernel spills */
     45#define TT_SPILL_1_NORMAL               0x84    /* userspace spills */
     46#define TT_SPILL_2_NORMAL               0x88    /* spills to userspace window buffer */
     47#define TT_SPILL_0_OTHER                0xa0    /* spills to userspace window buffer */
     48#define TT_FILL_0_NORMAL                0xc0    /* kernel fills */
     49#define TT_FILL_1_NORMAL                0xc4    /* userspace fills */
    4650
    4751#define REGWIN_HANDLER_SIZE             128
    … …  
    99103 */
    100104.macro SPILL_NORMAL_HANDLER_USERSPACE
    101         wr ASI_AIUP, %asi
     105        wr %g0, ASI_AIUP, %asi
    102106        stxa %l0, [%sp + STACK_BIAS + L0_OFFSET] %asi
    103107        stxa %l1, [%sp + STACK_BIAS + L1_OFFSET] %asi
    … …  
    121125
    122126/*
    123  * Macro used by the userspace during other spills.
    124  */
    125 .macro SPILL_OTHER_HANDLER_USERSPACE
    126         wr ASI_AIUS, %asi
    127         stxa %l0, [%sp + STACK_BIAS + L0_OFFSET] %asi
    128         stxa %l1, [%sp + STACK_BIAS + L1_OFFSET] %asi
    129         stxa %l2, [%sp + STACK_BIAS + L2_OFFSET] %asi
    130         stxa %l3, [%sp + STACK_BIAS + L3_OFFSET] %asi
    131         stxa %l4, [%sp + STACK_BIAS + L4_OFFSET] %asi
    132         stxa %l5, [%sp + STACK_BIAS + L5_OFFSET] %asi
    133         stxa %l6, [%sp + STACK_BIAS + L6_OFFSET] %asi
    134         stxa %l7, [%sp + STACK_BIAS + L7_OFFSET] %asi
    135         stxa %i0, [%sp + STACK_BIAS + I0_OFFSET] %asi
    136         stxa %i1, [%sp + STACK_BIAS + I1_OFFSET] %asi
    137         stxa %i2, [%sp + STACK_BIAS + I2_OFFSET] %asi
    138         stxa %i3, [%sp + STACK_BIAS + I3_OFFSET] %asi
    139         stxa %i4, [%sp + STACK_BIAS + I4_OFFSET] %asi
    140         stxa %i5, [%sp + STACK_BIAS + I5_OFFSET] %asi
    141         stxa %i6, [%sp + STACK_BIAS + I6_OFFSET] %asi
    142         stxa %i7, [%sp + STACK_BIAS + I7_OFFSET] %asi
     127 * Macro used to spill userspace window to userspace window buffer.
     128 * It can be either triggered from preemptible_handler doing SAVE
     129 * at (TL=1) or from normal kernel code doing SAVE when OTHERWIN>0
     130 * at (TL=0).
     131 */
     132.macro SPILL_TO_USPACE_WINDOW_BUFFER
     133        stx %l0, [%g7 + L0_OFFSET]     
     134        stx %l1, [%g7 + L1_OFFSET]
     135        stx %l2, [%g7 + L2_OFFSET]
     136        stx %l3, [%g7 + L3_OFFSET]
     137        stx %l4, [%g7 + L4_OFFSET]
     138        stx %l5, [%g7 + L5_OFFSET]
     139        stx %l6, [%g7 + L6_OFFSET]
     140        stx %l7, [%g7 + L7_OFFSET]
     141        stx %i0, [%g7 + I0_OFFSET]
     142        stx %i1, [%g7 + I1_OFFSET]
     143        stx %i2, [%g7 + I2_OFFSET]
     144        stx %i3, [%g7 + I3_OFFSET]
     145        stx %i4, [%g7 + I4_OFFSET]
     146        stx %i5, [%g7 + I5_OFFSET]
     147        stx %i6, [%g7 + I6_OFFSET]
     148        stx %i7, [%g7 + I7_OFFSET]
     149        add %g7, STACK_WINDOW_SAVE_AREA_SIZE, %g7
    143150        saved
    144151        retry
    … …  
    174181 */
    175182.macro FILL_NORMAL_HANDLER_USERSPACE
    176         wr ASI_AIUP, %asi
    177         ldxa [%sp + STACK_BIAS + L0_OFFSET] %asi, %l0
    178         ldxa [%sp + STACK_BIAS + L1_OFFSET] %asi, %l1
    179         ldxa [%sp + STACK_BIAS + L2_OFFSET] %asi, %l2
    180         ldxa [%sp + STACK_BIAS + L3_OFFSET] %asi, %l3
    181         ldxa [%sp + STACK_BIAS + L4_OFFSET] %asi, %l4
    182         ldxa [%sp + STACK_BIAS + L5_OFFSET] %asi, %l5
    183         ldxa [%sp + STACK_BIAS + L6_OFFSET] %asi, %l6
    184         ldxa [%sp + STACK_BIAS + L7_OFFSET] %asi, %l7
    185         ldxa [%sp + STACK_BIAS + I0_OFFSET] %asi, %i0
    186         ldxa [%sp + STACK_BIAS + I1_OFFSET] %asi, %i1
    187         ldxa [%sp + STACK_BIAS + I2_OFFSET] %asi, %i2
    188         ldxa [%sp + STACK_BIAS + I3_OFFSET] %asi, %i3
    189         ldxa [%sp + STACK_BIAS + I4_OFFSET] %asi, %i4
    190         ldxa [%sp + STACK_BIAS + I5_OFFSET] %asi, %i5
    191         ldxa [%sp + STACK_BIAS + I6_OFFSET] %asi, %i6
    192         ldxa [%sp + STACK_BIAS + I7_OFFSET] %asi, %i7
    193         restored
    194         retry
    195 .endm
    196 
    197 /*
    198  * Macro used by the userspace during other fills.
    199  */
    200 .macro FILL_OTHER_HANDLER_USERSPACE
    201         wr ASI_AIUS, %asi
     183        wr %g0, ASI_AIUP, %asi
    202184        ldxa [%sp + STACK_BIAS + L0_OFFSET] %asi, %l0
    203185        ldxa [%sp + STACK_BIAS + L1_OFFSET] %asi, %l1

  • kernel/arch/sparc64/src/asm.S

    r0fa6044 re11ae91  
    107107        b _memsetb
    108108        nop
     109
     110
     111.macro WRITE_ALTERNATE_REGISTER reg, bit
     112        save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
     113        rdpr %pstate, %l0
     114        wrpr %l0, \bit, %pstate
     115        mov %i0, \reg
     116        wrpr %l0, 0, %pstate
     117        ret
     118        restore
     119.endm
     120
     121.macro READ_ALTERNATE_REGISTER reg, bit
     122        save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
     123        rdpr %pstate, %l0
     124        wrpr %l0, \bit, %pstate
     125        mov \reg, %i0
     126        wrpr %l0, 0, %pstate
     127        ret
     128        restore
     129.endm
     130
     131.global write_to_ag_g6
     132write_to_ag_g6:
     133        WRITE_ALTERNATE_REGISTER %g6, PSTATE_AG_BIT
     134
     135.global write_to_ag_g7
     136write_to_ag_g7:
     137        WRITE_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT
     138
     139.global write_to_ig_g6
     140write_to_ig_g6:
     141        WRITE_ALTERNATE_REGISTER %g6, PSTATE_IG_BIT
     142
     143.global read_from_ag_g7
     144read_from_ag_g7:
     145        READ_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT

  • kernel/arch/sparc64/src/proc/scheduler.c

    r0fa6044 re11ae91  
    3737#include <arch.h>
    3838#include <arch/asm.h>
     39#include <arch/regdef.h>
     40#include <arch/stack.h>
    3941#include <arch/mm/tlb.h>
    4042#include <arch/mm/page.h>
    … …  
    5254 * Ensure that thread's kernel stack, as well as userspace window
    5355 * buffer for userspace threads, are locked in DTLB.
     56 * For userspace threads, initialize reserved global registers
     57 * in the alternate and interrupt sets.
    5458 */
    5559void before_thread_runs_arch(void)
    … …  
    8387                        dtlb_insert_mapping(uw_buf, KA2PA(uw_buf), PAGESIZE_8K, true, true);
    8488                }
     89               
     90                /*
     91                 * Write kernel stack address to %g6 and a pointer to the last item
     92                 * in the userspace window buffer to %g7 in the alternate and interrupt sets.
     93                 */
     94                write_to_ig_g6((uintptr_t) THREAD->kstack + STACK_SIZE - STACK_BIAS);
     95                write_to_ag_g6((uintptr_t) THREAD->kstack + STACK_SIZE - STACK_BIAS);
     96                write_to_ag_g7((uintptr_t) THREAD->arch.uspace_window_buffer);
    8597        }
    8698}
    … …  
    124136                        dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, (uintptr_t) uw_buf);
    125137                }
     138       
     139                /* sample the state of the userspace window buffer */   
     140                THREAD->arch.uspace_window_buffer = (uint8_t *) read_from_ag_g7();
    126141        }
    127142}

  • kernel/arch/sparc64/src/trap/trap_table.S

    r0fa6044 re11ae91  
    204204        SPILL_NORMAL_HANDLER_KERNEL
    205205
     206/* TT = 0x84, TL = 0, spill_1_normal handler */
     207.org trap_table + TT_SPILL_1_NORMAL*ENTRY_SIZE
     208.global spill_1_normal
     209spill_1_normal:
     210        SPILL_NORMAL_HANDLER_USERSPACE
     211
     212/* TT = 0x88, TL = 0, spill_2_normal handler */
     213.org trap_table + TT_SPILL_2_NORMAL*ENTRY_SIZE
     214.global spill_2_normal
     215spill_2_normal:
     216        SPILL_TO_USPACE_WINDOW_BUFFER
     217
    206218/* TT = 0xc0, TL = 0, fill_0_normal handler */
    207219.org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE
    … …  
    210222        FILL_NORMAL_HANDLER_KERNEL
    211223
     224/* TT = 0xc4, TL = 0, fill_1_normal handler */
     225.org trap_table + TT_FILL_1_NORMAL*ENTRY_SIZE
     226.global fill_1_normal
     227fill_1_normal:
     228        FILL_NORMAL_HANDLER_USERSPACE
     229
    212230/*
    213231 * Handlers for TL>0.
    … …  
    267285spill_0_normal_high:
    268286        SPILL_NORMAL_HANDLER_KERNEL
     287
     288/* TT = 0x88, TL > 0, spill_2_normal handler */
     289.org trap_table + (TT_SPILL_2_NORMAL+512)*ENTRY_SIZE
     290.global spill_2_normal_high
     291spill_2_normal_high:
     292        SPILL_TO_USPACE_WINDOW_BUFFER
     293
     294/* TT = 0xa0, TL > 0, spill_0_other handler */
     295.org trap_table + (TT_SPILL_0_OTHER+512)*ENTRY_SIZE
     296.global spill_0_other_high
     297spill_0_other_high:
     298        SPILL_TO_USPACE_WINDOW_BUFFER
    269299
    270300/* TT = 0xc0, TL > 0, fill_0_normal handler */
    … …  
    290320 *      %g2             Argument for the function.
    291321 *      %g6             Pre-set as kernel stack base if trap from userspace.
    292  *      %g7             Reserved.
     322 *      %g7             Pre-set as address of the userspace window buffer.
    293323 */
    294324.global preemptible_handler

  • kernel/generic/include/config.h

    r0fa6044 re11ae91  
    6464        size_t kernel_size;             /**< Size of memory in bytes taken by kernel and stack */
    6565       
    66         uintptr_t stack_base;   /**< Base adddress of initial stack */
     66        uintptr_t stack_base;           /**< Base adddress of initial stack */
    6767        size_t stack_size;              /**< Size of initial stack */
    6868} config_t;
Note: See TracChangeset for help on using the changeset viewer.