Changeset e11ae91 in mainline for kernel/arch/sparc64/src/asm.S

Timestamp:

2006-08-30T11:31:25Z (18 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

ee454eb

Parents:

0fa6044

Message:

sparc64 work.

• Modify before_thread_runs_arch() to store addresses of the kernel stack and

userspace window buffer, resp., to registers %g6 and %g7, resp, in the
alternate and interrupt global sets.

• Modify after_thread_ran_arch() to sample %g7 from the alternate globals.
• Implement trap handler for spilling register windows into userspace window buffer.
• Implement assembly language functions to access %g6 and %g7 registers in the alternate sets.
• Initialize the trap table so that there are now also spill_1_normal, spill_2_normal,

spill_0_other and fill_1_normal handlers. These handlers are used in different situations
and for different purposes.

File:

• kernel/arch/sparc64/src/asm.S (modified) (1 diff)

kernel/arch/sparc64/src/asm.S

@@ -107 +107 @@
         b _memsetb
         nop
+
+
+.macro WRITE_ALTERNATE_REGISTER reg, bit
+        save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
+        rdpr %pstate, %l0
+        wrpr %l0, \bit, %pstate
+        mov %i0, \reg
+        wrpr %l0, 0, %pstate
+        ret
+        restore
+.endm
+
+.macro READ_ALTERNATE_REGISTER reg, bit
+        save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
+        rdpr %pstate, %l0
+        wrpr %l0, \bit, %pstate
+        mov \reg, %i0
+        wrpr %l0, 0, %pstate
+        ret
+        restore
+.endm
+
+.global write_to_ag_g6
+write_to_ag_g6:
+        WRITE_ALTERNATE_REGISTER %g6, PSTATE_AG_BIT
+
+.global write_to_ag_g7
+write_to_ag_g7:
+        WRITE_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT
+
+.global write_to_ig_g6
+write_to_ig_g6:
+        WRITE_ALTERNATE_REGISTER %g6, PSTATE_IG_BIT
+
+.global read_from_ag_g7
+read_from_ag_g7:
+        READ_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT