Changeset e1a27be in mainline for kernel/arch/arm32/src/exception.c
- Timestamp:
- 2012-12-29T10:48:35Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 17cc8f4f
- Parents:
- 8f88beb (diff), c928bb7 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
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- 1 edited
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kernel/arch/arm32/src/exception.c
r8f88beb re1a27be 161 161 } 162 162 163 /** Undefined instruction exception handler. 164 * 165 * Calls scheduler_fpu_lazy_request 166 */ 167 static void undef_insn_exception(unsigned int exc_no, istate_t *istate) 168 { 169 #ifdef CONFIG_FPU 170 if (handle_if_fpu_exception()) { 171 /* 172 * Retry the failing instruction, 173 * ARM Architecture Reference Manual says on p.B1-1169 174 * that offset for undef instruction exception is 4 175 */ 176 istate->pc -= 4; 177 return; 178 } 179 #endif 180 fault_if_from_uspace(istate, "Undefined instruction."); 181 panic_badtrap(istate, exc_no, "Undefined instruction."); 182 } 183 163 184 /** Initializes exception handling. 164 185 * … … 174 195 install_exception_handlers(); 175 196 197 exc_register(EXC_UNDEF_INSTR, "undefined instruction", true, 198 (iroutine_t) undef_insn_exception); 176 199 exc_register(EXC_IRQ, "interrupt", true, 177 200 (iroutine_t) irq_exception);
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