Changeset e2bf639 in mainline
- Timestamp:
- 2006-09-05T21:06:59Z (18 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- d7e3f1ad
- Parents:
- 5035eeb7
- Location:
- kernel
- Files:
-
- 8 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/include/trap/exception.h
r5035eeb7 re2bf639 38 38 39 39 #define TT_INSTRUCTION_ACCESS_EXCEPTION 0x08 40 #define TT_INSTRUCTION_ACCESS_ERROR 0x0a 40 41 #define TT_ILLEGAL_INSTRUCTION 0x10 42 #define TT_PRIVILEGED_OPCODE 0x11 43 #define TT_DIVISION_BY_ZERO 0x28 44 #define TT_DATA_ACCESS_EXCEPTION 0x30 41 45 #define TT_DATA_ACCESS_ERROR 0x32 42 46 #define TT_MEM_ADDRESS_NOT_ALIGNED 0x34 47 #define TT_PRIVILEGED_ACTION 0x38 43 48 44 49 #ifndef __ASM__ … … 46 51 #include <typedefs.h> 47 52 48 extern void do_instruction_access_exc(int n, istate_t *istate); 49 extern void do_mem_address_not_aligned(int n, istate_t *istate); 50 extern void do_data_access_error(int n, istate_t *istate); 51 extern void do_illegal_instruction(int n, istate_t *istate); 53 extern void instruction_access_exception(int n, istate_t *istate); 54 extern void instruction_access_error(int n, istate_t *istate); 55 extern void illegal_instruction(int n, istate_t *istate); 56 extern void privileged_opcode(int n, istate_t *istate); 57 extern void division_by_zero(int n, istate_t *istate); 58 extern void data_access_exception(int n, istate_t *istate); 59 extern void data_access_error(int n, istate_t *istate); 60 extern void mem_address_not_aligned(int n, istate_t *istate); 61 extern void privileged_action(int n, istate_t *istate); 62 52 63 53 64 #endif /* !__ASM__ */ -
kernel/arch/sparc64/include/trap/mmu.h
r5035eeb7 re2bf639 63 63 .endm 64 64 65 .macro FAST_DATA_ACCESS_MMU_MISS_HANDLER 65 .macro FAST_DATA_ACCESS_MMU_MISS_HANDLER tl 66 66 /* 67 67 * First, try to refill TLB from TSB. … … 101 101 */ 102 102 0: 103 HANDLE_MMU_TRAPS_FROM_SPILL_OR_FILL 103 .if (\tl > 0) 104 wrpr %g0, 1, %tl 105 .endif 104 106 105 107 wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate … … 107 109 .endm 108 110 109 .macro FAST_DATA_ACCESS_PROTECTION_HANDLER 111 .macro FAST_DATA_ACCESS_PROTECTION_HANDLER tl 110 112 /* 111 113 * First, try to refill TLB from TSB. … … 116 118 * The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER. 117 119 */ 118 HANDLE_MMU_TRAPS_FROM_SPILL_OR_FILL 120 .if (\tl > 0) 121 wrpr %g0, 1, %tl 122 .endif 119 123 120 124 wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate 121 125 PREEMPTIBLE_HANDLER fast_data_access_protection 122 .endm123 124 .macro MEM_ADDRESS_NOT_ALIGNED_HANDLER125 ba mem_address_not_aligned_handler126 nop127 .endm128 129 /*130 * Macro used to lower TL when a MMU trap is caused by131 * the userspace register window spill or fill handler.132 */133 .macro HANDLE_MMU_TRAPS_FROM_SPILL_OR_FILL134 rdpr %tl, %g1135 sub %g1, 1, %g2136 brz %g2, 0f ! if TL was 1, skip137 nop138 wrpr %g2, 0, %tl ! TL--139 rdpr %tt, %g3140 cmp %g3, TT_SPILL_1_NORMAL141 be 0f ! trap from spill_1_normal?142 cmp %g3, TT_FILL_1_NORMAL143 bne,a 0f ! trap from fill_1_normal? (negated condition)144 wrpr %g1, 0, %tl ! TL++145 0:146 126 .endm 147 127 -
kernel/arch/sparc64/src/mm/tlb.c
r5035eeb7 re2bf639 41 41 #include <arch/mm/mmu.h> 42 42 #include <arch/interrupt.h> 43 #include <interrupt.h> 43 44 #include <arch.h> 44 45 #include <print.h> … … 309 310 char *tpc_str = get_symtab_entry(istate->tpc); 310 311 312 fault_if_from_uspace(istate, "%s\n", str); 311 313 printf("TPC=%p, (%s)\n", istate->tpc, tpc_str); 312 314 panic("%s\n", str); … … 320 322 va = tag.vpn << PAGE_WIDTH; 321 323 324 fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context); 322 325 printf("Faulting page: %p, ASID=%d\n", va, tag.context); 323 326 printf("TPC=%p, (%s)\n", istate->tpc, tpc_str); … … 332 335 va = tag.vpn << PAGE_WIDTH; 333 336 337 fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context); 334 338 printf("Faulting page: %p, ASID=%d\n", va, tag.context); 335 339 printf("TPC=%p, (%s)\n", istate->tpc, tpc_str); -
kernel/arch/sparc64/src/trap/exception.c
r5035eeb7 re2bf639 36 36 #include <arch/trap/exception.h> 37 37 #include <arch/interrupt.h> 38 #include <interrupt.h> 38 39 #include <arch/asm.h> 39 40 #include <debug.h> 40 41 #include <typedefs.h> 41 42 42 /** Handle instruction_access_exception. */43 void do_instruction_access_exc(int n, istate_t *istate)43 /** Handle instruction_access_exception. (0x8) */ 44 void instruction_access_exception(int n, istate_t *istate) 44 45 { 45 panic("Instruction Access Exception at %p.\n", istate->tpc); 46 fault_if_from_uspace(istate, "%s\n", __FUNCTION__); 47 panic("%s at %p.\n", __FUNCTION__, istate->tpc); 46 48 } 47 49 48 /** Handle mem_address_not_aligned.*/49 void do_mem_address_not_aligned(int n, istate_t *istate)50 /** Handle instruction_access_error. (0xa) */ 51 void instruction_access_error(int n, istate_t *istate) 50 52 { 51 panic("Memory Address Not Aligned from %p.\n", istate->tpc); 53 fault_if_from_uspace(istate, "%s\n", __FUNCTION__); 54 panic("%s at %p.\n", __FUNCTION__, istate->tpc); 52 55 } 53 56 54 /** Handle data_access_error.*/55 void do_data_access_error(int n, istate_t *istate)57 /** Handle illegal_instruction. (0x10) */ 58 void illegal_instruction(int n, istate_t *istate) 56 59 { 57 panic("Data Access Error from %p.\n", istate->tpc); 60 fault_if_from_uspace(istate, "%s\n", __FUNCTION__); 61 panic("%s at %p.\n", __FUNCTION__, istate->tpc); 58 62 } 59 63 60 /** Handle mem_address_not_aligned.*/61 void do_illegal_instruction(int n, istate_t *istate)64 /** Handle privileged_opcode. (0x11) */ 65 void privileged_opcode(int n, istate_t *istate) 62 66 { 63 panic("Illegal Instruction at %p.\n", istate->tpc); 67 fault_if_from_uspace(istate, "%s\n", __FUNCTION__); 68 panic("%s at %p.\n", __FUNCTION__, istate->tpc); 69 } 70 71 /** Handle division_by_zero. (0x28) */ 72 void division_by_zero(int n, istate_t *istate) 73 { 74 fault_if_from_uspace(istate, "%s\n", __FUNCTION__); 75 panic("%s at %p.\n", __FUNCTION__, istate->tpc); 76 } 77 78 /** Handle data_access_exception. (0x30) */ 79 void data_access_exception(int n, istate_t *istate) 80 { 81 fault_if_from_uspace(istate, "%s\n", __FUNCTION__); 82 panic("%s from %p.\n", __FUNCTION__, istate->tpc); 83 } 84 85 /** Handle data_access_error. (0x32) */ 86 void data_access_error(int n, istate_t *istate) 87 { 88 fault_if_from_uspace(istate, "%s\n", __FUNCTION__); 89 panic("%s from %p.\n", __FUNCTION__, istate->tpc); 90 } 91 92 /** Handle mem_address_not_aligned. (0x34) */ 93 void mem_address_not_aligned(int n, istate_t *istate) 94 { 95 fault_if_from_uspace(istate, "%s\n", __FUNCTION__); 96 panic("%s from %p.\n", __FUNCTION__, istate->tpc); 97 } 98 99 /** Handle privileged_action. (0x37) */ 100 void privileged_action(int n, istate_t *istate) 101 { 102 fault_if_from_uspace(istate, "%s\n", __FUNCTION__); 103 panic("%s at %p.\n", __FUNCTION__, istate->tpc); 64 104 } 65 105 66 106 /** @} 67 107 */ 68 -
kernel/arch/sparc64/src/trap/interrupt.c
r5035eeb7 re2bf639 62 62 void irq_ipc_bind_arch(unative_t irq) 63 63 { 64 panic("not implemented\n");65 64 /* TODO */ 66 65 } -
kernel/arch/sparc64/src/trap/mmu.S
r5035eeb7 re2bf639 41 41 #include <arch/regdef.h> 42 42 43 .global mem_address_not_aligned_handler44 mem_address_not_aligned_handler:45 HANDLE_MMU_TRAPS_FROM_SPILL_OR_FILL46 PREEMPTIBLE_HANDLER do_mem_address_not_aligned -
kernel/arch/sparc64/src/trap/trap_table.S
r5035eeb7 re2bf639 60 60 /* TT = 0x08, TL = 0, instruction_access_exception */ 61 61 .org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE 62 .global instruction_access_exception 63 instruction_access_exception: 64 PREEMPTIBLE_HANDLER do_instruction_access_exc 62 .global instruction_access_exception_tl0 63 instruction_access_exception_tl0: 64 wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate 65 PREEMPTIBLE_HANDLER instruction_access_exception 66 67 /* TT = 0x0a, TL = 0, instruction_access_error */ 68 .org trap_table + TT_INSTRUCTION_ACCESS_ERROR*ENTRY_SIZE 69 .global instruction_access_error_tl0 70 instruction_access_error_tl0: 71 PREEMPTIBLE_HANDLER instruction_access_error 65 72 66 73 /* TT = 0x10, TL = 0, illegal_instruction */ 67 74 .org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE 68 .global illegal_instruction 69 illegal_instruction: 70 PREEMPTIBLE_HANDLER do_illegal_instruction 75 .global illegal_instruction_tl0 76 illegal_instruction_tl0: 77 PREEMPTIBLE_HANDLER illegal_instruction 78 79 /* TT = 0x11, TL = 0, privileged_opcode */ 80 .org trap_table + TT_PRIVILEGED_OPCODE*ENTRY_SIZE 81 .global privileged_opcode_tl0 82 privileged_opcode_tl0: 83 PREEMPTIBLE_HANDLER privileged_opcode 71 84 72 85 /* TT = 0x24, TL = 0, clean_window handler */ 73 86 .org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE 74 .global clean_window_handler 75 clean_window_handler :87 .global clean_window_handler_tl0 88 clean_window_handler_tl0: 76 89 CLEAN_WINDOW_HANDLER 90 91 /* TT = 0x28, TL = 0, division_by_zero */ 92 .org trap_table + TT_DIVISION_BY_ZERO*ENTRY_SIZE 93 .global division_by_zero_tl0 94 division_by_zero_tl0: 95 PREEMPTIBLE_HANDLER division_by_zero 96 97 /* TT = 0x30, TL = 0, data_access_exception */ 98 .org trap_table + TT_DATA_ACCESS_EXCEPTION*ENTRY_SIZE 99 .global data_access_exception_tl0 100 data_access_exception_tl0: 101 wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate 102 PREEMPTIBLE_HANDLER data_access_exception 77 103 78 104 /* TT = 0x32, TL = 0, data_access_error */ 79 105 .org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE 80 .global data_access_error 81 data_access_error :82 PREEMPTIBLE_HANDLER d o_data_access_error106 .global data_access_error_tl0 107 data_access_error_tl0: 108 PREEMPTIBLE_HANDLER data_access_error 83 109 84 110 /* TT = 0x34, TL = 0, mem_address_not_aligned */ 85 111 .org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE 86 .global mem_address_not_aligned 87 mem_address_not_aligned: 88 MEM_ADDRESS_NOT_ALIGNED_HANDLER 112 .global mem_address_not_aligned_tl0 113 mem_address_not_aligned_tl0: 114 PREEMPTIBLE_HANDLER mem_address_not_aligned 115 116 /* TT = 0x38, TL = 0, privileged_action */ 117 .org trap_table + TT_PRIVILEGED_ACTION*ENTRY_SIZE 118 .global privileged_action_tl0 119 privileged_action_tl0: 120 PREEMPTIBLE_HANDLER privileged_action 89 121 90 122 /* TT = 0x41, TL = 0, interrupt_level_1 handler */ 91 123 .org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE 92 .global interrupt_level_1_handler 93 interrupt_level_1_handler :124 .global interrupt_level_1_handler_tl0 125 interrupt_level_1_handler_tl0: 94 126 INTERRUPT_LEVEL_N_HANDLER 1 95 127 96 128 /* TT = 0x42, TL = 0, interrupt_level_2 handler */ 97 129 .org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE 98 .global interrupt_level_2_handler 99 interrupt_level_2_handler :130 .global interrupt_level_2_handler_tl0 131 interrupt_level_2_handler_tl0: 100 132 INTERRUPT_LEVEL_N_HANDLER 2 101 133 102 134 /* TT = 0x43, TL = 0, interrupt_level_3 handler */ 103 135 .org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE 104 .global interrupt_level_3_handler 105 interrupt_level_3_handler :136 .global interrupt_level_3_handler_tl0 137 interrupt_level_3_handler_tl0: 106 138 INTERRUPT_LEVEL_N_HANDLER 3 107 139 108 140 /* TT = 0x44, TL = 0, interrupt_level_4 handler */ 109 141 .org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE 110 .global interrupt_level_4_handler 111 interrupt_level_4_handler :142 .global interrupt_level_4_handler_tl0 143 interrupt_level_4_handler_tl0: 112 144 INTERRUPT_LEVEL_N_HANDLER 4 113 145 114 146 /* TT = 0x45, TL = 0, interrupt_level_5 handler */ 115 147 .org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE 116 .global interrupt_level_5_handler 117 interrupt_level_5_handler :148 .global interrupt_level_5_handler_tl0 149 interrupt_level_5_handler_tl0: 118 150 INTERRUPT_LEVEL_N_HANDLER 5 119 151 120 152 /* TT = 0x46, TL = 0, interrupt_level_6 handler */ 121 153 .org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE 122 .global interrupt_level_6_handler 123 interrupt_level_6_handler :154 .global interrupt_level_6_handler_tl0 155 interrupt_level_6_handler_tl0: 124 156 INTERRUPT_LEVEL_N_HANDLER 6 125 157 126 158 /* TT = 0x47, TL = 0, interrupt_level_7 handler */ 127 159 .org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE 128 .global interrupt_level_7_handler 129 interrupt_level_7_handler :160 .global interrupt_level_7_handler_tl0 161 interrupt_level_7_handler_tl0: 130 162 INTERRUPT_LEVEL_N_HANDLER 7 131 163 132 164 /* TT = 0x48, TL = 0, interrupt_level_8 handler */ 133 165 .org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE 134 .global interrupt_level_8_handler 135 interrupt_level_8_handler :166 .global interrupt_level_8_handler_tl0 167 interrupt_level_8_handler_tl0: 136 168 INTERRUPT_LEVEL_N_HANDLER 8 137 169 138 170 /* TT = 0x49, TL = 0, interrupt_level_9 handler */ 139 171 .org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE 140 .global interrupt_level_9_handler 141 interrupt_level_9_handler :172 .global interrupt_level_9_handler_tl0 173 interrupt_level_9_handler_tl0: 142 174 INTERRUPT_LEVEL_N_HANDLER 9 143 175 144 176 /* TT = 0x4a, TL = 0, interrupt_level_10 handler */ 145 177 .org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE 146 .global interrupt_level_10_handler 147 interrupt_level_10_handler :178 .global interrupt_level_10_handler_tl0 179 interrupt_level_10_handler_tl0: 148 180 INTERRUPT_LEVEL_N_HANDLER 10 149 181 150 182 /* TT = 0x4b, TL = 0, interrupt_level_11 handler */ 151 183 .org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE 152 .global interrupt_level_11_handler 153 interrupt_level_11_handler :184 .global interrupt_level_11_handler_tl0 185 interrupt_level_11_handler_tl0: 154 186 INTERRUPT_LEVEL_N_HANDLER 11 155 187 156 188 /* TT = 0x4c, TL = 0, interrupt_level_12 handler */ 157 189 .org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE 158 .global interrupt_level_12_handler 159 interrupt_level_12_handler :190 .global interrupt_level_12_handler_tl0 191 interrupt_level_12_handler_tl0: 160 192 INTERRUPT_LEVEL_N_HANDLER 12 161 193 162 194 /* TT = 0x4d, TL = 0, interrupt_level_13 handler */ 163 195 .org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE 164 .global interrupt_level_13_handler 165 interrupt_level_13_handler :196 .global interrupt_level_13_handler_tl0 197 interrupt_level_13_handler_tl0: 166 198 INTERRUPT_LEVEL_N_HANDLER 13 167 199 168 200 /* TT = 0x4e, TL = 0, interrupt_level_14 handler */ 169 201 .org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE 170 .global interrupt_level_14_handler 171 interrupt_level_14_handler :202 .global interrupt_level_14_handler_tl0 203 interrupt_level_14_handler_tl0: 172 204 INTERRUPT_LEVEL_N_HANDLER 14 173 205 174 206 /* TT = 0x4f, TL = 0, interrupt_level_15 handler */ 175 207 .org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE 176 .global interrupt_level_15_handler 177 interrupt_level_15_handler :208 .global interrupt_level_15_handler_tl0 209 interrupt_level_15_handler_tl0: 178 210 INTERRUPT_LEVEL_N_HANDLER 15 179 211 180 212 /* TT = 0x60, TL = 0, interrupt_vector_trap handler */ 181 213 .org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE 182 .global interrupt_vector_trap_handler 183 interrupt_vector_trap_handler :214 .global interrupt_vector_trap_handler_tl0 215 interrupt_vector_trap_handler_tl0: 184 216 INTERRUPT_VECTOR_TRAP_HANDLER 185 217 186 218 /* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */ 187 219 .org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE 188 .global fast_instruction_access_mmu_miss_handler 189 fast_instruction_access_mmu_miss_handler :220 .global fast_instruction_access_mmu_miss_handler_tl0 221 fast_instruction_access_mmu_miss_handler_tl0: 190 222 FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER 191 223 192 224 /* TT = 0x68, TL = 0, fast_data_access_MMU_miss */ 193 225 .org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE 194 .global fast_data_access_mmu_miss_handler 195 fast_data_access_mmu_miss_handler :196 FAST_DATA_ACCESS_MMU_MISS_HANDLER 226 .global fast_data_access_mmu_miss_handler_tl0 227 fast_data_access_mmu_miss_handler_tl0: 228 FAST_DATA_ACCESS_MMU_MISS_HANDLER 0 197 229 198 230 /* TT = 0x6c, TL = 0, fast_data_access_protection */ 199 231 .org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE 200 .global fast_data_access_protection_handler 201 fast_data_access_protection_handler :202 FAST_DATA_ACCESS_PROTECTION_HANDLER 232 .global fast_data_access_protection_handler_tl0 233 fast_data_access_protection_handler_tl0: 234 FAST_DATA_ACCESS_PROTECTION_HANDLER 0 203 235 204 236 /* TT = 0x80, TL = 0, spill_0_normal handler */ 205 237 .org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE 206 .global spill_0_normal 207 spill_0_normal :238 .global spill_0_normal_tl0 239 spill_0_normal_tl0: 208 240 SPILL_NORMAL_HANDLER_KERNEL 209 241 210 242 /* TT = 0x84, TL = 0, spill_1_normal handler */ 211 243 .org trap_table + TT_SPILL_1_NORMAL*ENTRY_SIZE 212 .global spill_1_normal 213 spill_1_normal :244 .global spill_1_normal_tl0 245 spill_1_normal_tl0: 214 246 SPILL_NORMAL_HANDLER_USERSPACE 215 247 216 248 /* TT = 0x88, TL = 0, spill_2_normal handler */ 217 249 .org trap_table + TT_SPILL_2_NORMAL*ENTRY_SIZE 218 .global spill_2_normal 219 spill_2_normal :250 .global spill_2_normal_tl0 251 spill_2_normal_tl0: 220 252 SPILL_TO_USPACE_WINDOW_BUFFER 221 253 222 254 /* TT = 0xa0, TL = 0, spill_0_other handler */ 223 255 .org trap_table + TT_SPILL_0_OTHER*ENTRY_SIZE 224 .global spill_0_other 225 spill_0_other :256 .global spill_0_other_tl0 257 spill_0_other_tl0: 226 258 SPILL_TO_USPACE_WINDOW_BUFFER 227 259 228 260 /* TT = 0xc0, TL = 0, fill_0_normal handler */ 229 261 .org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE 230 .global fill_0_normal 231 fill_0_normal :262 .global fill_0_normal_tl0 263 fill_0_normal_tl0: 232 264 FILL_NORMAL_HANDLER_KERNEL 233 265 234 266 /* TT = 0xc4, TL = 0, fill_1_normal handler */ 235 267 .org trap_table + TT_FILL_1_NORMAL*ENTRY_SIZE 236 .global fill_1_normal 237 fill_1_normal :268 .global fill_1_normal_tl0 269 fill_1_normal_tl0: 238 270 FILL_NORMAL_HANDLER_USERSPACE 239 271 240 272 /* TT = 0x100, TL = 0, trap_instruction_0 */ 241 273 .org trap_table + TT_TRAP_INSTRUCTION(0)*ENTRY_SIZE 242 .global trap_instruction_0 243 trap_instruction_0 :274 .global trap_instruction_0_tl0 275 trap_instruction_0_tl0: 244 276 TRAP_INSTRUCTION 0 245 277 246 278 /* TT = 0x101, TL = 0, trap_instruction_1 */ 247 279 .org trap_table + TT_TRAP_INSTRUCTION(1)*ENTRY_SIZE 248 .global trap_instruction_1 249 trap_instruction_1 :280 .global trap_instruction_1_tl0 281 trap_instruction_1_tl0: 250 282 TRAP_INSTRUCTION 1 251 283 252 284 /* TT = 0x102, TL = 0, trap_instruction_2 */ 253 285 .org trap_table + TT_TRAP_INSTRUCTION(2)*ENTRY_SIZE 254 .global trap_instruction_2 255 trap_instruction_2 :286 .global trap_instruction_2_tl0 287 trap_instruction_2_tl0: 256 288 TRAP_INSTRUCTION 2 257 289 258 290 /* TT = 0x103, TL = 0, trap_instruction_3 */ 259 291 .org trap_table + TT_TRAP_INSTRUCTION(3)*ENTRY_SIZE 260 .global trap_instruction_3 261 trap_instruction_3 :292 .global trap_instruction_3_tl0 293 trap_instruction_3_tl0: 262 294 TRAP_INSTRUCTION 3 263 295 264 296 /* TT = 0x104, TL = 0, trap_instruction_4 */ 265 297 .org trap_table + TT_TRAP_INSTRUCTION(4)*ENTRY_SIZE 266 .global trap_instruction_4 267 trap_instruction_4 :298 .global trap_instruction_4_tl0 299 trap_instruction_4_tl0: 268 300 TRAP_INSTRUCTION 4 269 301 270 302 /* TT = 0x105, TL = 0, trap_instruction_5 */ 271 303 .org trap_table + TT_TRAP_INSTRUCTION(5)*ENTRY_SIZE 272 .global trap_instruction_5 273 trap_instruction_5 :304 .global trap_instruction_5_tl0 305 trap_instruction_5_tl0: 274 306 TRAP_INSTRUCTION 5 275 307 276 308 /* TT = 0x106, TL = 0, trap_instruction_6 */ 277 309 .org trap_table + TT_TRAP_INSTRUCTION(6)*ENTRY_SIZE 278 .global trap_instruction_6 279 trap_instruction_6 :310 .global trap_instruction_6_tl0 311 trap_instruction_6_tl0: 280 312 TRAP_INSTRUCTION 6 281 313 282 314 /* TT = 0x107, TL = 0, trap_instruction_7 */ 283 315 .org trap_table + TT_TRAP_INSTRUCTION(7)*ENTRY_SIZE 284 .global trap_instruction_7 285 trap_instruction_7 :316 .global trap_instruction_7_tl0 317 trap_instruction_7_tl0: 286 318 TRAP_INSTRUCTION 7 287 319 288 320 /* TT = 0x108, TL = 0, trap_instruction_8 */ 289 321 .org trap_table + TT_TRAP_INSTRUCTION(8)*ENTRY_SIZE 290 .global trap_instruction_8 291 trap_instruction_8 :322 .global trap_instruction_8_tl0 323 trap_instruction_8_tl0: 292 324 TRAP_INSTRUCTION 8 293 325 294 326 /* TT = 0x109, TL = 0, trap_instruction_9 */ 295 327 .org trap_table + TT_TRAP_INSTRUCTION(9)*ENTRY_SIZE 296 .global trap_instruction_9 297 trap_instruction_9 :328 .global trap_instruction_9_tl0 329 trap_instruction_9_tl0: 298 330 TRAP_INSTRUCTION 9 299 331 300 332 /* TT = 0x10a, TL = 0, trap_instruction_10 */ 301 333 .org trap_table + TT_TRAP_INSTRUCTION(10)*ENTRY_SIZE 302 .global trap_instruction_10 303 trap_instruction_10 :334 .global trap_instruction_10_tl0 335 trap_instruction_10_tl0: 304 336 TRAP_INSTRUCTION 10 305 337 306 338 /* TT = 0x10b, TL = 0, trap_instruction_11 */ 307 339 .org trap_table + TT_TRAP_INSTRUCTION(11)*ENTRY_SIZE 308 .global trap_instruction_11 309 trap_instruction_11 :340 .global trap_instruction_11_tl0 341 trap_instruction_11_tl0: 310 342 TRAP_INSTRUCTION 11 311 343 312 344 /* TT = 0x10c, TL = 0, trap_instruction_12 */ 313 345 .org trap_table + TT_TRAP_INSTRUCTION(12)*ENTRY_SIZE 314 .global trap_instruction_12 315 trap_instruction_12 :346 .global trap_instruction_12_tl0 347 trap_instruction_12_tl0: 316 348 TRAP_INSTRUCTION 12 317 349 318 350 /* TT = 0x10d, TL = 0, trap_instruction_13 */ 319 351 .org trap_table + TT_TRAP_INSTRUCTION(13)*ENTRY_SIZE 320 .global trap_instruction_13 321 trap_instruction_13 :352 .global trap_instruction_13_tl0 353 trap_instruction_13_tl0: 322 354 TRAP_INSTRUCTION 13 323 355 324 356 /* TT = 0x10e, TL = 0, trap_instruction_14 */ 325 357 .org trap_table + TT_TRAP_INSTRUCTION(14)*ENTRY_SIZE 326 .global trap_instruction_14 327 trap_instruction_14 :358 .global trap_instruction_14_tl0 359 trap_instruction_14_tl0: 328 360 TRAP_INSTRUCTION 14 329 361 330 362 /* TT = 0x10f, TL = 0, trap_instruction_15 */ 331 363 .org trap_table + TT_TRAP_INSTRUCTION(15)*ENTRY_SIZE 332 .global trap_instruction_15 333 trap_instruction_15 :364 .global trap_instruction_15_tl0 365 trap_instruction_15_tl0: 334 366 TRAP_INSTRUCTION 15 335 367 336 368 /* TT = 0x110, TL = 0, trap_instruction_16 */ 337 369 .org trap_table + TT_TRAP_INSTRUCTION(16)*ENTRY_SIZE 338 .global trap_instruction_16 339 trap_instruction_16 :370 .global trap_instruction_16_tl0 371 trap_instruction_16_tl0: 340 372 TRAP_INSTRUCTION 16 341 373 342 374 /* TT = 0x111, TL = 0, trap_instruction_17 */ 343 375 .org trap_table + TT_TRAP_INSTRUCTION(17)*ENTRY_SIZE 344 .global trap_instruction_17 345 trap_instruction_17 :376 .global trap_instruction_17_tl0 377 trap_instruction_17_tl0: 346 378 TRAP_INSTRUCTION 17 347 379 348 380 /* TT = 0x112, TL = 0, trap_instruction_18 */ 349 381 .org trap_table + TT_TRAP_INSTRUCTION(18)*ENTRY_SIZE 350 .global trap_instruction_18 351 trap_instruction_18 :382 .global trap_instruction_18_tl0 383 trap_instruction_18_tl0: 352 384 TRAP_INSTRUCTION 18 353 385 354 386 /* TT = 0x113, TL = 0, trap_instruction_19 */ 355 387 .org trap_table + TT_TRAP_INSTRUCTION(19)*ENTRY_SIZE 356 .global trap_instruction_19 357 trap_instruction_19 :388 .global trap_instruction_19_tl0 389 trap_instruction_19_tl0: 358 390 TRAP_INSTRUCTION 19 359 391 360 392 /* TT = 0x114, TL = 0, trap_instruction_20 */ 361 393 .org trap_table + TT_TRAP_INSTRUCTION(20)*ENTRY_SIZE 362 .global trap_instruction_20 363 trap_instruction_20 :394 .global trap_instruction_20_tl0 395 trap_instruction_20_tl0: 364 396 TRAP_INSTRUCTION 20 365 397 366 398 /* TT = 0x115, TL = 0, trap_instruction_21 */ 367 399 .org trap_table + TT_TRAP_INSTRUCTION(21)*ENTRY_SIZE 368 .global trap_instruction_21 369 trap_instruction_21 :400 .global trap_instruction_21_tl0 401 trap_instruction_21_tl0: 370 402 TRAP_INSTRUCTION 21 371 403 372 404 /* TT = 0x116, TL = 0, trap_instruction_22 */ 373 405 .org trap_table + TT_TRAP_INSTRUCTION(22)*ENTRY_SIZE 374 .global trap_instruction_22 375 trap_instruction_22 :406 .global trap_instruction_22_tl0 407 trap_instruction_22_tl0: 376 408 TRAP_INSTRUCTION 22 377 409 378 410 /* TT = 0x117, TL = 0, trap_instruction_23 */ 379 411 .org trap_table + TT_TRAP_INSTRUCTION(23)*ENTRY_SIZE 380 .global trap_instruction_23 381 trap_instruction_23 :412 .global trap_instruction_23_tl0 413 trap_instruction_23_tl0: 382 414 TRAP_INSTRUCTION 23 383 415 384 416 /* TT = 0x118, TL = 0, trap_instruction_24 */ 385 417 .org trap_table + TT_TRAP_INSTRUCTION(24)*ENTRY_SIZE 386 .global trap_instruction_24 387 trap_instruction_24 :418 .global trap_instruction_24_tl0 419 trap_instruction_24_tl0: 388 420 TRAP_INSTRUCTION 24 389 421 390 422 /* TT = 0x119, TL = 0, trap_instruction_25 */ 391 423 .org trap_table + TT_TRAP_INSTRUCTION(25)*ENTRY_SIZE 392 .global trap_instruction_25 393 trap_instruction_25 :424 .global trap_instruction_25_tl0 425 trap_instruction_25_tl0: 394 426 TRAP_INSTRUCTION 25 395 427 396 428 /* TT = 0x11a, TL = 0, trap_instruction_26 */ 397 429 .org trap_table + TT_TRAP_INSTRUCTION(26)*ENTRY_SIZE 398 .global trap_instruction_26 399 trap_instruction_26 :430 .global trap_instruction_26_tl0 431 trap_instruction_26_tl0: 400 432 TRAP_INSTRUCTION 26 401 433 402 434 /* TT = 0x11b, TL = 0, trap_instruction_27 */ 403 435 .org trap_table + TT_TRAP_INSTRUCTION(27)*ENTRY_SIZE 404 .global trap_instruction_27 405 trap_instruction_27 :436 .global trap_instruction_27_tl0 437 trap_instruction_27_tl0: 406 438 TRAP_INSTRUCTION 27 407 439 408 440 /* TT = 0x11c, TL = 0, trap_instruction_28 */ 409 441 .org trap_table + TT_TRAP_INSTRUCTION(28)*ENTRY_SIZE 410 .global trap_instruction_28 411 trap_instruction_28 :442 .global trap_instruction_28_tl0 443 trap_instruction_28_tl0: 412 444 TRAP_INSTRUCTION 28 413 445 414 446 /* TT = 0x11d, TL = 0, trap_instruction_29 */ 415 447 .org trap_table + TT_TRAP_INSTRUCTION(29)*ENTRY_SIZE 416 .global trap_instruction_29 417 trap_instruction_29 :448 .global trap_instruction_29_tl0 449 trap_instruction_29_tl0: 418 450 TRAP_INSTRUCTION 29 419 451 420 452 /* TT = 0x11e, TL = 0, trap_instruction_30 */ 421 453 .org trap_table + TT_TRAP_INSTRUCTION(30)*ENTRY_SIZE 422 .global trap_instruction_30 423 trap_instruction_30 :454 .global trap_instruction_30_tl0 455 trap_instruction_30_tl0: 424 456 TRAP_INSTRUCTION 30 425 457 426 458 /* TT = 0x11f, TL = 0, trap_instruction_31 */ 427 459 .org trap_table + TT_TRAP_INSTRUCTION(31)*ENTRY_SIZE 428 .global trap_instruction_31 429 trap_instruction_31 :460 .global trap_instruction_31_tl0 461 trap_instruction_31_tl0: 430 462 TRAP_INSTRUCTION 31 431 463 … … 436 468 /* TT = 0x08, TL > 0, instruction_access_exception */ 437 469 .org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE 438 .global instruction_access_exception_high 439 instruction_access_exception_high: 440 PREEMPTIBLE_HANDLER do_instruction_access_exc 470 .global instruction_access_exception_tl1 471 instruction_access_exception_tl1: 472 wrpr %g0, 1, %tl 473 wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate 474 PREEMPTIBLE_HANDLER instruction_access_exception 475 476 /* TT = 0x0a, TL > 0, instruction_access_error */ 477 .org trap_table + (TT_INSTRUCTION_ACCESS_ERROR+512)*ENTRY_SIZE 478 .global instruction_access_error_tl1 479 instruction_access_error_tl1: 480 wrpr %g0, 1, %tl 481 PREEMPTIBLE_HANDLER instruction_access_error 441 482 442 483 /* TT = 0x10, TL > 0, illegal_instruction */ 443 484 .org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE 444 .global illegal_instruction_high 445 illegal_instruction_high: 446 PREEMPTIBLE_HANDLER do_illegal_instruction 485 .global illegal_instruction_tl1 486 illegal_instruction_tl1: 487 wrpr %g0, 1, %tl 488 PREEMPTIBLE_HANDLER illegal_instruction 447 489 448 490 /* TT = 0x24, TL > 0, clean_window handler */ 449 491 .org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE 450 .global clean_window_handler_ high451 clean_window_handler_ high:492 .global clean_window_handler_tl1 493 clean_window_handler_tl1: 452 494 CLEAN_WINDOW_HANDLER 495 496 /* TT = 0x28, TL > 0, division_by_zero */ 497 .org trap_table + (TT_DIVISION_BY_ZERO+512)*ENTRY_SIZE 498 .global division_by_zero_tl1 499 division_by_zero_tl1: 500 wrpr %g0, 1, %tl 501 PREEMPTIBLE_HANDLER division_by_zero 502 503 /* TT = 0x30, TL > 0, data_access_exception */ 504 .org trap_table + (TT_DATA_ACCESS_EXCEPTION+512)*ENTRY_SIZE 505 .global data_access_exception_tl1 506 data_access_exception_tl1: 507 wrpr %g0, 1, %tl 508 wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate 509 PREEMPTIBLE_HANDLER data_access_exception 453 510 454 511 /* TT = 0x32, TL > 0, data_access_error */ 455 512 .org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE 456 .global data_access_error_high 457 data_access_error_high: 458 PREEMPTIBLE_HANDLER do_data_access_error 513 .global data_access_error_tl1 514 data_access_error_tl1: 515 wrpr %g0, 1, %tl 516 PREEMPTIBLE_HANDLER data_access_error 459 517 460 518 /* TT = 0x34, TL > 0, mem_address_not_aligned */ 461 519 .org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE 462 .global mem_address_not_aligned_high 463 mem_address_not_aligned_high: 464 MEM_ADDRESS_NOT_ALIGNED_HANDLER 465 466 /* TT = 0x64, TL > 0, fast_instruction_access_MMU_miss */ 467 .org trap_table + (TT_FAST_INSTRUCTION_ACCESS_MMU_MISS+512)*ENTRY_SIZE 468 .global fast_instruction_access_mmu_miss_handler_high 469 fast_instruction_access_mmu_miss_handler_high: 470 FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER 520 .global mem_address_not_aligned_tl1 521 mem_address_not_aligned_tl1: 522 wrpr %g0, 1, %tl 523 PREEMPTIBLE_HANDLER mem_address_not_aligned 471 524 472 525 /* TT = 0x68, TL > 0, fast_data_access_MMU_miss */ 473 526 .org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE 474 .global fast_data_access_mmu_miss_handler_ high475 fast_data_access_mmu_miss_handler_ high:476 FAST_DATA_ACCESS_MMU_MISS_HANDLER 527 .global fast_data_access_mmu_miss_handler_tl1 528 fast_data_access_mmu_miss_handler_tl1: 529 FAST_DATA_ACCESS_MMU_MISS_HANDLER 1 477 530 478 531 /* TT = 0x6c, TL > 0, fast_data_access_protection */ 479 532 .org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE 480 .global fast_data_access_protection_handler_ high481 fast_data_access_protection_handler_ high:482 FAST_DATA_ACCESS_PROTECTION_HANDLER 533 .global fast_data_access_protection_handler_tl1 534 fast_data_access_protection_handler_tl1: 535 FAST_DATA_ACCESS_PROTECTION_HANDLER 1 483 536 484 537 /* TT = 0x80, TL > 0, spill_0_normal handler */ 485 538 .org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE 486 .global spill_0_normal_ high487 spill_0_normal_ high:539 .global spill_0_normal_tl1 540 spill_0_normal_tl1: 488 541 SPILL_NORMAL_HANDLER_KERNEL 489 542 490 543 /* TT = 0x88, TL > 0, spill_2_normal handler */ 491 544 .org trap_table + (TT_SPILL_2_NORMAL+512)*ENTRY_SIZE 492 .global spill_2_normal_ high493 spill_2_normal_ high:545 .global spill_2_normal_tl1 546 spill_2_normal_tl1: 494 547 SPILL_TO_USPACE_WINDOW_BUFFER 495 548 496 549 /* TT = 0xa0, TL > 0, spill_0_other handler */ 497 550 .org trap_table + (TT_SPILL_0_OTHER+512)*ENTRY_SIZE 498 .global spill_0_other_ high499 spill_0_other_ high:551 .global spill_0_other_tl1 552 spill_0_other_tl1: 500 553 SPILL_TO_USPACE_WINDOW_BUFFER 501 554 502 555 /* TT = 0xc0, TL > 0, fill_0_normal handler */ 503 556 .org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE 504 .global fill_0_normal_ high505 fill_0_normal_ high:557 .global fill_0_normal_tl1 558 fill_0_normal_tl1: 506 559 FILL_NORMAL_HANDLER_KERNEL 507 560 -
kernel/generic/include/interrupt.h
r5035eeb7 re2bf639 56 56 { \ 57 57 if (istate_from_uspace(istate)) { \ 58 klog_printf(cmd, ##__VA_ARGS__); \59 klog_printf("Task %lld got exception at PC:%p. Task killed.", TASK->taskid, istate_get_pc(istate)); \58 klog_printf("Task %lld killed due to an exception at %p.", TASK->taskid, istate_get_pc(istate)); \ 59 klog_printf(" " cmd, ##__VA_ARGS__); \ 60 60 task_kill(TASK->taskid); \ 61 61 thread_exit(); \
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