Changeset e2cc9a0 in mainline
- Timestamp:
- 2006-10-06T22:37:15Z (18 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 33b1903
- Parents:
- 233af8c5
- Location:
- kernel
- Files:
-
- 2 added
- 8 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/Makefile.inc
r233af8c5 re2cc9a0 101 101 arch/$(ARCH)/src/drivers/tick.c \ 102 102 arch/$(ARCH)/src/drivers/kbd.c \ 103 arch/$(ARCH)/src/drivers/scr.c 103 arch/$(ARCH)/src/drivers/scr.c \ 104 arch/$(ARCH)/src/drivers/pci.c 104 105 105 106 ifeq ($(CONFIG_SMP),y) -
kernel/arch/sparc64/include/asm.h
r233af8c5 re2cc9a0 325 325 uint64_t v; 326 326 327 __asm__ volatile ("ldxa [%1] %2, %0\n" : "=r" (v) : "r" (va), "i" ( asi));327 __asm__ volatile ("ldxa [%1] %2, %0\n" : "=r" (v) : "r" (va), "i" ((unsigned) asi)); 328 328 329 329 return v; … … 338 338 static inline void asi_u64_write(asi_t asi, uintptr_t va, uint64_t v) 339 339 { 340 __asm__ volatile ("stxa %0, [%1] %2\n" : : "r" (v), "r" (va), "i" ( asi) : "memory");340 __asm__ volatile ("stxa %0, [%1] %2\n" : : "r" (v), "r" (va), "i" ((unsigned) asi) : "memory"); 341 341 } 342 342 -
kernel/arch/sparc64/include/drivers/ns16550.h
r233af8c5 re2cc9a0 39 39 #include <arch/drivers/kbd.h> 40 40 41 /* NS16550 registers */ 41 42 #define RBR_REG 0 /** Receiver Buffer Register. */ 42 43 #define IER_REG 1 /** Interrupt Enable Register. */ 44 #define IIR_REG 2 /** Interrupt Ident Register (read). */ 45 #define FCR_REG 2 /** FIFO control register (write). */ 46 #define LCR_REG 3 /** Line Control register. */ 43 47 #define LSR_REG 5 /** Line Status Register. */ 48 49 #define IER_ERBFI 0x01 /** Enable Receive Buffer Full Interrupt. */ 50 51 #define LCR_DLAB 0x80 /** Divisor Latch Access bit. */ 44 52 45 53 static inline uint8_t ns16550_rbr_read(void) … … 58 66 } 59 67 68 static inline uint8_t ns16550_iir_read(void) 69 { 70 return kbd_virt_address[IIR_REG]; 71 } 72 73 static inline void ns16550_fcr_write(uint8_t v) 74 { 75 kbd_virt_address[FCR_REG] = v; 76 } 77 78 static inline uint8_t ns16550_lcr_read(void) 79 { 80 return kbd_virt_address[LCR_REG]; 81 } 82 83 static inline void ns16550_lcr_write(uint8_t v) 84 { 85 kbd_virt_address[LCR_REG] = v; 86 } 87 60 88 static inline uint8_t ns16550_lsr_read(void) 61 89 { -
kernel/arch/sparc64/include/trap/interrupt.h
r233af8c5 re2cc9a0 40 40 #include <arch/trap/trap_table.h> 41 41 #include <arch/stack.h> 42 43 /* IMAP register bits */ 44 #define IGN_MASK 0x7c0 45 #define INO_MASK 0x1f 46 #define IMAP_V_MASK (1ULL<<31) 47 48 #define IGN_SHIFT 6 49 42 50 43 51 /* Interrupt ASI registers. */ -
kernel/arch/sparc64/src/drivers/kbd.c
r233af8c5 re2cc9a0 100 100 uintptr_t pa; 101 101 size_t size; 102 int in o;102 int inr; 103 103 104 104 switch (kbd_type) { … … 109 109 return; 110 110 } 111 if (!ofw_fhc_map_interrupts(node->parent, ((ofw_fhc_reg_t *) prop->value), interrupts, &in o)) {111 if (!ofw_fhc_map_interrupts(node->parent, ((ofw_fhc_reg_t *) prop->value), interrupts, &inr)) { 112 112 printf("Failed to determine keyboard interrupts.\n"); 113 113 return; … … 120 120 return; 121 121 } 122 if (!ofw_ebus_map_interrupts(node->parent, ((ofw_ebus_reg_t *) prop->value), interrupts, &in o)) {122 if (!ofw_ebus_map_interrupts(node->parent, ((ofw_ebus_reg_t *) prop->value), interrupts, &inr)) { 123 123 printf("Failed to determine keyboard interrupts.\n"); 124 124 return; -
kernel/genarch/src/kbd/ns16550.c
r233af8c5 re2cc9a0 91 91 sysinfo_set_item_val("kbd.irq", NULL, 0); 92 92 sysinfo_set_item_val("kbd.address.virtual", NULL, (uintptr_t) kbd_virt_address); 93 94 ns16550_ier_write(IER_ERBFI); /* enable receiver interrupt */ 95 96 while (ns16550_lsr_read() & LSR_DATA_READY) 97 (void) ns16550_rbr_read(); 93 98 } 94 99 … … 145 150 uint8_t x; 146 151 147 while ( ((x = ns16550_lsr_read() & LSR_DATA_READY))) {152 while (ns16550_lsr_read() & LSR_DATA_READY) { 148 153 x = ns16550_rbr_read(); 149 154 if (x != IGNORE_CODE) { -
kernel/genarch/src/ofw/ebus.c
r233af8c5 re2cc9a0 37 37 38 38 #include <genarch/ofw/ofw_tree.h> 39 #include <arch/drivers/pci.h> 39 40 #include <arch/memstr.h> 41 #include <arch/trap/interrupt.h> 40 42 #include <func.h> 41 43 #include <panic.h> … … 43 45 #include <macros.h> 44 46 47 /** Apply EBUS ranges to EBUS register. */ 45 48 bool ofw_ebus_apply_ranges(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uintptr_t *pa) 46 49 { … … 113 116 * We found the device that functions as an interrupt controller 114 117 * for the interrupt. We also found mapping from interrupt to INR. 118 * What needs to be done now is to verify that this indeed is a PCI 119 * node. 115 120 */ 116 121 117 122 controller = ofw_tree_find_node_by_handle(ofw_tree_lookup("/"), intr_map[i].controller_handle); 123 if (!controller) 124 return false; 125 126 if (strcmp(ofw_tree_node_name(controller), "pci") != 0) { 127 /* 128 * This is not a PCI node. 129 */ 130 return false; 131 } 132 133 pci_t *pci = controller->device; 134 if (!pci) { 135 pci = pci_init(controller); 136 if (!pci) 137 return false; 138 controller->device = pci; 139 140 } 141 pci_enable_interrupt(pci, intr_map[i].controller_inr); 142 143 *inr = intr_map[i].controller_inr; 144 *inr |= 0x1f << IGN_SHIFT; /* 0x1f is hardwired IGN */ 118 145 119 *inr = intr_map[i].controller_inr;120 146 return true; 121 147 } -
kernel/genarch/src/ofw/upa.c
r233af8c5 re2cc9a0 46 46 { 47 47 *pa = reg->addr; 48 return false;48 return true; 49 49 } 50 50
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