Changeset e4398200 in mainline


Ignore:
Timestamp:
2006-10-08T21:15:14Z (18 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
84060e2
Parents:
7ba7c6d
Message:

Small change of code organization.
No functional difference.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/sparc64/src/trap/trap_table.S

    r7ba7c6d re4398200  
    738738        rdpr %tpc, %g2
    739739        rdpr %tnpc, %g3
     740        rd %y, %g4
    740741
    741742        /*
    … …  
    755756         * Surprisingly, gcc makes use of this register without a notice.
    756757         */
    757         rd %y, %g4
    758758        stx %g4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y]
    759759       
    … …  
    788788
    789789        /*
    790          * Restore Y.
    791          */
    792         ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y], %g4
    793         wr %g4, %y
    794 
    795         /*
    796790         * Copy PSTATE.PEF to the in-register copy of TSTATE.
    797791         */
    … …  
    809803        wrpr %g3, 0, %tnpc
    810804
     805        /*
     806         * Restore Y.
     807         */
     808        ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y], %g4
     809        wr %g4, %y
    811810
    812811        /*
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