Changeset e4c8e751 in mainline
- Timestamp:
- 2013-05-30T22:33:52Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 0e575cd
- Parents:
- 9ce0683
- Location:
- uspace/lib/c/arch/amd64/src
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/lib/c/arch/amd64/src/entryjmp.s
r9ce0683 re4c8e751 39 39 mov %rdi, %rdx 40 40 mov %rsi, %rdi 41 41 42 42 # jump to entry point 43 43 jmp %rdx -
uspace/lib/c/arch/amd64/src/fibril.S
r9ce0683 re4c8e751 42 42 movq (%rsp), %rdx # the caller's return %eip 43 43 44 # In %edi is passed 1st argument44 # in %edi is passed 1st argument 45 45 CONTEXT_SAVE_ARCH_CORE %rdi %rdx 46 46 47 # Save TLS47 # save TLS 48 48 movq %fs:0, %rax 49 49 movq %rax, OFFSET_TLS(%rdi) 50 51 xorl %eax, %eax 50 51 xorl %eax, %eax # context_save returns 1 52 52 incl %eax 53 53 ret 54 55 54 56 55 ## Restore current CPU context … … 64 63 65 64 movq %rdx,(%rsp) 66 65 67 66 # Set thread local storage 68 movq OFFSET_TLS(%rdi), %rdi 69 movl $1, %eax 67 movq OFFSET_TLS(%rdi), %rdi # Set arg1 to TLS addr 68 movl $1, %eax # SYS_TLS_SET 70 69 syscall 71 72 xorl %eax, %eax 70 71 xorl %eax, %eax # context_restore returns 0 73 72 ret -
uspace/lib/c/arch/amd64/src/thread_entry.s
r9ce0683 re4c8e751 40 40 pushq $0 41 41 movq %rsp, %rbp 42 42 43 43 # 44 44 # RAX contains address of uarg
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