Changeset e5ecc02 in mainline for kernel/arch/mips32/include/arch.h

Timestamp:

2006-09-14T13:07:32Z (18 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

06e1e95

Parents:

775df25

Message:

When creating TLB mapping for the sparc64 kernel, enable CV (cacheable virtually) bit.
Also install locked mappings only in context 0.

(No files)