Changeset e84439a in mainline
- Timestamp:
- 2005-09-06T08:51:22Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- e949fd6
- Parents:
- 39ae77b
- Files:
-
- 2 added
- 2 deleted
- 14 edited
- 1 moved
Legend:
- Unmodified
- Added
- Removed
-
arch/amd64/include/arch.h
r39ae77b re84439a 1 1 /* 2 * Copyright (C) 2005 Martin Decky2 * Copyright (C) 2005 Ondrej Palkovsky 3 3 * All rights reserved. 4 4 * -
arch/amd64/include/context.h
r39ae77b re84439a 1 1 /* 2 * Copyright (C) 2005 Martin Decky2 * Copyright (C) 2005 Ondrej Palkovsky 3 3 * All rights reserved. 4 4 * … … 41 41 #define SP_DELTA 16 42 42 43 /* We include only registers that must be preserved 44 * during function call 45 */ 43 46 struct context { 44 47 __u64 sp; -
arch/amd64/include/faddr.h
r39ae77b re84439a 1 1 /* 2 * Copyright (C) 2005 Martin Decky2 * Copyright (C) 2005 Ondrej Palkovsky 3 3 * All rights reserved. 4 4 * -
arch/amd64/include/thread.h
r39ae77b re84439a 1 1 /* 2 * Copyright (C) 2005 Martin Decky2 * Copyright (C) 2005 Ondrej Palkovsky 3 3 * All rights reserved. 4 4 * -
arch/mips/boot/Makefile
r39ae77b re84439a 10 10 11 11 AS=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-as 12 CC=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-gcc 12 13 LD=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-ld 13 14 14 ASFLAGS=-mips2 15 ASFLAGS=-mips2 -I../../../include 15 16 LFLAGS=--oformat=binary -mips2 -e start 16 17 18 .S.o: 19 $(CC) $(ASFLAGS) -c -o $@ $< 20 17 21 boot.bin: boot.o 18 $(LD) $(LFLAGS) boot.o-o $@22 $(LD) $(LFLAGS) $< -o $@ 19 23 20 boot.o:21 $(AS) boot.s -o $@22 24 23 25 clean: -
arch/mips/boot/boot.S
r39ae77b re84439a 33 33 .set nomacro 34 34 35 #include <arch/asm/boot.h> 36 35 37 .global start 36 38 start: 37 # move 0x80000000 to reg $838 lui $8, 0x800039 lui $ra, KERNEL_STARTUP_ADDRESS >> 16 40 ori $ra, KERNEL_STARTUP_ADDRESS & 0xffff 39 41 40 # prepare stack 41 lui $29, 0x8100 42 43 j $8 42 j $ra 44 43 nop -
arch/mips/include/context.h
r39ae77b re84439a 30 30 #define __mips_CONTEXT_H__ 31 31 32 # include <arch/types.h>32 #define STACK_ITEM_SIZE 4 33 33 34 #define STACK_ITEM_SIZE 4 34 /* These are offsets into the register dump saved 35 * on exception entry 36 */ 37 #define EOFFSET_AT 0 38 #define EOFFSET_V0 4 39 #define EOFFSET_V1 8 40 #define EOFFSET_A0 12 41 #define EOFFSET_A1 16 42 #define EOFFSET_A2 20 43 #define EOFFSET_A3 24 44 #define EOFFSET_A4 28 45 #define EOFFSET_T1 32 46 #define EOFFSET_T2 36 47 #define EOFFSET_T3 40 48 #define EOFFSET_T4 44 49 #define EOFFSET_T5 48 50 #define EOFFSET_T6 52 51 #define EOFFSET_T7 56 52 #define EOFFSET_T8 60 53 #define EOFFSET_T9 64 54 #define EOFFSET_S0 68 55 #define EOFFSET_S1 72 56 #define EOFFSET_S2 76 57 #define EOFFSET_S3 80 58 #define EOFFSET_S4 84 59 #define EOFFSET_S5 88 60 #define EOFFSET_S6 92 61 #define EOFFSET_S7 96 62 #define EOFFSET_S8 100 63 #define EOFFSET_GP 104 64 #define EOFFSET_RA 108 65 #define EOFFSET_LO 112 66 #define EOFFSET_HI 116 67 68 #define REGISTER_SPACE 120 35 69 36 70 /* … … 40 74 41 75 76 #ifndef __ASM__ 77 78 #ifndef __mips_TYPES_H_ 79 # include <arch/types.h> 80 #endif 81 82 /* 83 * Only save registers that must be preserved across 84 * function calls. 85 */ 42 86 struct context { 43 __u32 r0;44 __u32 r1;45 __u32 r2;46 __u32 r3;47 __u32 r4;48 __u32 r5;49 __u32 r6;50 __u32 r7;51 __u32 r8;52 __u32 r9;53 __u32 r10;54 __u32 r11;55 __u32 r12;56 __u32 r13;57 __u32 r14;58 __u32 r15;59 __u32 r16;60 __u32 r17;61 __u32 r18;62 __u32 r19;63 __u32 r20;64 __u32 r21;65 __u32 r22;66 __u32 r23;67 __u32 r24;68 __u32 r25;69 __u32 r26;70 __u32 r27;71 __u32 r28;72 87 __u32 sp; 73 __u32 r30;74 88 __u32 pc; 89 90 __u32 s0; 91 __u32 s1; 92 __u32 s2; 93 __u32 s3; 94 __u32 s4; 95 __u32 s5; 96 __u32 s6; 97 __u32 s7; 98 __u32 s8; 99 __u32 gp; 100 75 101 __u32 pri; 76 102 }; 77 103 104 #endif /* __ASM__ */ 105 78 106 #endif -
arch/mips/include/mm/page.h
r39ae77b re84439a 30 30 #define __mips_PAGE_H__ 31 31 32 #include <arch/mm/tlb.h>33 #include <mm/page.h>34 #include <arch/mm/frame.h>35 #include <arch/types.h>36 37 32 #define PAGE_SIZE FRAME_SIZE 38 33 39 #define KA2PA(x) (((__address) (x)) - 0x80000000) 40 #define PA2KA(x) (((__address) (x)) + 0x80000000) 34 #ifndef __ASM__ 35 # define KA2PA(x) (((__address) (x)) - 0x80000000) 36 # define PA2KA(x) (((__address) (x)) + 0x80000000) 37 #else 38 # define KA2PA(x) ((x) - 0x80000000) 39 # define PA2KA(x) ((x) + 0x80000000) 40 #endif 41 41 42 42 /* … … 82 82 #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x)) 83 83 84 #ifndef __ASM__ 85 86 #include <arch/mm/tlb.h> 87 #include <mm/page.h> 88 #include <arch/mm/frame.h> 89 #include <arch/types.h> 90 84 91 static inline int get_pt_flags(pte_t *pt, index_t i) 85 92 { … … 110 117 extern pte_t *PTL0; 111 118 119 #endif /* __ASM__ */ 120 112 121 #endif -
arch/mips/src/context.S
r39ae77b re84439a 27 27 # 28 28 29 #include <arch/asm/macro.h> 30 29 #define __ASM__ 30 #include <arch/asm/regname.h> 31 #include "context_offset.h" 32 31 33 .text 32 34 … … 38 40 .global context_restore 39 41 42 .macro CONTEXT_STORE r 43 sw $s0,OFFSET_S0(\r) 44 sw $s1,OFFSET_S1(\r) 45 sw $s2,OFFSET_S2(\r) 46 sw $s3,OFFSET_S3(\r) 47 sw $s4,OFFSET_S4(\r) 48 sw $s5,OFFSET_S5(\r) 49 sw $s6,OFFSET_S6(\r) 50 sw $s7,OFFSET_S7(\r) 51 sw $s8,OFFSET_S7(\r) 52 sw $gp,OFFSET_GP(\r) 53 54 sw $ra,OFFSET_PC(\r) 55 sw $sp,OFFSET_SP(\r) 56 .endm 57 58 .macro CONTEXT_LOAD r 59 lw $s0,OFFSET_S0(\r) 60 lw $s1,OFFSET_S1(\r) 61 lw $s2,OFFSET_S2(\r) 62 lw $s3,OFFSET_S3(\r) 63 lw $s4,OFFSET_S4(\r) 64 lw $s5,OFFSET_S5(\r) 65 lw $s6,OFFSET_S6(\r) 66 lw $s7,OFFSET_S7(\r) 67 lw $s8,OFFSET_S7(\r) 68 lw $gp,OFFSET_GP(\r) 69 70 lw $ra,OFFSET_PC(\r) 71 lw $sp,OFFSET_SP(\r) 72 .endm 73 74 40 75 context_save: 41 REGISTERS_STORE $476 CONTEXT_STORE $a0 42 77 43 78 # context_save returns 1 … … 46 81 47 82 context_restore: 48 REGISTERS_LOAD $483 CONTEXT_LOAD $a0 49 84 50 85 # context_restore returns 0 -
arch/mips/src/mm/tlb.c
r39ae77b re84439a 36 36 #include <symtab.h> 37 37 38 void main_bsp(void);39 40 int bootstrap = 1;41 42 38 void tlb_refill(void) 43 39 { 44 if (bootstrap) {45 bootstrap = 0;46 main_bsp();47 }48 49 40 panic("tlb_refill exception\n"); 50 41 } -
arch/mips/src/start.S
r39ae77b re84439a 1 # 1 2 2 # Copyright (C) 2001-2004 Jakub Jermar 3 3 # All rights reserved. … … 27 27 # 28 28 29 #include <arch/asm/macro.h> 30 31 #define STACK_SPACE 128 32 29 #define __ASM__ 30 31 #include <arch/asm/regname.h> 32 #include <arch/mm/page.h> 33 #include <arch/asm/boot.h> 34 #include <arch/context.h> 35 33 36 .text 34 37 … … 42 45 .global exception_entry 43 46 47 .macro REGISTERS_STORE r 48 sw $at,EOFFSET_AT(\r) 49 sw $v0,EOFFSET_V0(\r) 50 sw $v1,EOFFSET_V1(\r) 51 sw $a0,EOFFSET_A0(\r) 52 sw $a1,EOFFSET_A1(\r) 53 sw $a2,EOFFSET_A2(\r) 54 sw $a3,EOFFSET_A3(\r) 55 sw $t0,EOFFSET_A4(\r) 56 sw $t1,EOFFSET_T1(\r) 57 sw $t2,EOFFSET_T2(\r) 58 sw $t3,EOFFSET_T3(\r) 59 sw $t4,EOFFSET_T4(\r) 60 sw $t5,EOFFSET_T5(\r) 61 sw $t6,EOFFSET_T6(\r) 62 sw $t7,EOFFSET_T7(\r) 63 sw $t8,EOFFSET_T8(\r) 64 sw $t9,EOFFSET_T9(\r) 65 sw $s0,EOFFSET_S0(\r) 66 sw $s1,EOFFSET_S1(\r) 67 sw $s2,EOFFSET_S2(\r) 68 sw $s3,EOFFSET_S3(\r) 69 sw $s4,EOFFSET_S4(\r) 70 sw $s5,EOFFSET_S5(\r) 71 sw $s6,EOFFSET_S6(\r) 72 sw $s7,EOFFSET_S7(\r) 73 sw $s8,EOFFSET_S8(\r) 74 sw $gp,EOFFSET_GP(\r) 75 sw $ra,EOFFSET_RA(\r) 76 mflo $k0 77 mfhi $k1 78 sw $k0,EOFFSET_LO(\r) 79 sw $k1,EOFFSET_HI(\r) 80 .endm 81 82 .macro REGISTERS_LOAD r 83 lw $at,EOFFSET_AT(\r) 84 lw $v0,EOFFSET_V0(\r) 85 lw $v1,EOFFSET_V1(\r) 86 lw $a0,EOFFSET_A0(\r) 87 lw $a1,EOFFSET_A1(\r) 88 lw $a2,EOFFSET_A2(\r) 89 lw $a3,EOFFSET_A3(\r) 90 lw $t0,EOFFSET_A4(\r) 91 lw $t1,EOFFSET_T1(\r) 92 lw $t2,EOFFSET_T2(\r) 93 lw $t3,EOFFSET_T3(\r) 94 lw $t4,EOFFSET_T4(\r) 95 lw $t5,EOFFSET_T5(\r) 96 lw $t6,EOFFSET_T6(\r) 97 lw $t7,EOFFSET_T7(\r) 98 lw $t8,EOFFSET_T8(\r) 99 lw $t9,EOFFSET_T9(\r) 100 lw $s0,EOFFSET_S0(\r) 101 lw $s1,EOFFSET_S1(\r) 102 lw $s2,EOFFSET_S2(\r) 103 lw $s3,EOFFSET_S3(\r) 104 lw $s4,EOFFSET_S4(\r) 105 lw $s5,EOFFSET_S5(\r) 106 lw $s6,EOFFSET_S6(\r) 107 lw $s7,EOFFSET_S7(\r) 108 lw $s8,EOFFSET_S8(\r) 109 lw $gp,EOFFSET_GP(\r) 110 lw $ra,EOFFSET_RA(\r) 111 112 lw $k0,EOFFSET_LO(\r) 113 lw $k1,EOFFSET_HI(\r) 114 mtlo $k0 115 mthi $k1 116 .endm 117 118 44 119 .org 0x0 45 kernel_image_start:46 120 tlb_refill_entry: 47 121 j tlb_refill_handler … … 56 130 exception_entry: 57 131 exception_handler: 58 sub $ 29, STACK_SPACE59 REGISTERS_STORE $ 29132 sub $sp, REGISTER_SPACE 133 REGISTERS_STORE $sp 60 134 61 135 jal exception 62 136 nop 63 137 64 REGISTERS_LOAD $ 2965 add $ 29, STACK_SPACE138 REGISTERS_LOAD $sp 139 add $sp, REGISTER_SPACE 66 140 67 141 eret 142 nop 68 143 144 .org KA2PA(0x80000300) 145 kernel_image_start: 146 /* Load temporary stack */ 147 lui $sp, (TEMP_STACK_START + TEMP_STACK_SIZE) >> 16 148 ori $sp, (TEMP_STACK_START + TEMP_STACK_SIZE) & 0xffff 149 150 /* Not sure about this, but might be needed for PIC code???? */ 151 lui $gp, 0x8000 152 153 jal main_bsp 154 nop 155 156 .org KA2PA(TEMP_STACK_START) 157 .space TEMP_STACK_SIZE 158 69 159 tlb_refill_handler: 70 sub $ 29, STACK_SPACE71 REGISTERS_STORE $ 29160 sub $sp, REGISTER_SPACE 161 REGISTERS_STORE $sp 72 162 73 163 jal tlb_refill 74 164 nop 75 165 76 REGISTERS_LOAD $ 2977 add $ 29, STACK_SPACE166 REGISTERS_LOAD $sp 167 add $sp, REGISTER_SPACE 78 168 79 169 eret 170 nop 80 171 81 172 cache_error_handler: 82 sub $ 29, STACK_SPACE83 REGISTERS_STORE $ 29173 sub $sp, REGISTER_SPACE 174 REGISTERS_STORE $sp 84 175 85 176 jal cache_error 86 177 nop 87 178 88 REGISTERS_LOAD $ 2989 add $ 29, STACK_SPACE179 REGISTERS_LOAD $sp 180 add $sp, REGISTER_SPACE 90 181 91 182 eret 183 nop -
src/Makefile.config
r39ae77b re84439a 21 21 22 22 # Uncomment if you want to run in the test mode 23 #TEST=__TEST__23 TEST=__TEST__ 24 24 25 25 TEST_FILE=test.c … … 29 29 #TEST_DIR=synch/rwlock2/ 30 30 #TEST_DIR=synch/rwlock3/ 31 #TEST_DIR=synch/rwlock4/31 TEST_DIR=synch/rwlock4/ 32 32 #TEST_DIR=synch/rwlock5/ 33 33 #TEST_DIR=synch/semaphore1/ -
src/build.amd64
r39ae77b re84439a 16 16 done 17 17 18 for a in atomic.h ega.h fpu_context.h i8042.h i8259.h i8254.h interrupt.h bios mm/memory_init.h boot/memmap.h boot/memmapasm.h smp acpi ; do18 for a in atomic.h ega.h fpu_context.h i8042.h i8259.h i8254.h interrupt.h bios mm/memory_init.h boot/memmap.h boot/memmapasm.h smp acpi barrier.h; do 19 19 if [ \! -e amd64/include/$a ]; then 20 20 echo ln -sf `pwd`/ia32/include/$a amd64/include/$a -
src/build.mips
r39ae77b re84439a 1 1 #! /bin/sh 2 2 3 set -e 4 # Generate context_offset.h 5 (cd ../tools/mips/;make gencontext;./gencontext) 6 7 3 8 make all ARCH=mips -
src/clean.mips
r39ae77b re84439a 2 2 3 3 make dist-clean ARCH=mips 4 5 rm ../tools/mips/gencontext
Note:
See TracChangeset
for help on using the changeset viewer.