Changes in uspace/drv/nic/e1k/e1k.c [c4be33a:e86b8f0] in mainline
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/nic/e1k/e1k.c
rc4be33a re86b8f0 44 44 #include <libarch/ddi.h> 45 45 #include <as.h> 46 #include <ddf/log.h> 46 47 #include <ddf/interrupt.h> 47 48 #include <devman.h> … … 51 52 #include <nil_remote.h> 52 53 #include <ops/nic.h> 53 #include <packet_client.h>54 #include <packet_remote.h>55 #include <net/packet_header.h>56 54 #include "e1k.h" 57 55 … … 61 59 62 60 /* Must be power of 8 */ 63 #define E1000_RX_ PACKETS_COUNT 12864 #define E1000_TX_ PACKETS_COUNT 12861 #define E1000_RX_FRAME_COUNT 128 62 #define E1000_TX_FRAME_COUNT 128 65 63 66 64 #define E1000_RECEIVE_ADDRESS 16 67 65 68 /** Maximum receiving packet size */ 69 #define E1000_MAX_RECEIVE_PACKET_SIZE 2048 66 /** Maximum sending frame size */ 67 #define E1000_MAX_SEND_FRAME_SIZE 2048 68 /** Maximum receiving frame size */ 69 #define E1000_MAX_RECEIVE_FRAME_SIZE 2048 70 70 71 71 /** nic_driver_data_t* -> e1000_t* cast */ … … 111 111 /** E1000 device data */ 112 112 typedef struct { 113 /** Device configuration */ 114 e1000_info_t info; 115 113 116 /** Physical registers base address */ 114 117 void *reg_base_phys; … … 121 124 void *tx_ring_virt; 122 125 123 /** Packets in tx ring */ 124 packet_t **tx_ring_packets; 126 /** Ring of TX frames, physical address */ 127 void **tx_frame_phys; 128 /** Ring of TX frames, virtual address */ 129 void **tx_frame_virt; 125 130 126 131 /** Physical rx ring address */ … … 129 134 void *rx_ring_virt; 130 135 131 /** Packets in rx ring */ 132 packet_t **rx_ring_packets; 136 /** Ring of RX frames, physical address */ 137 void **rx_frame_phys; 138 /** Ring of RX frames, virtual address */ 139 void **rx_frame_virt; 133 140 134 141 /** VLAN tag */ 135 142 uint16_t vlan_tag; 136 143 137 /** Add VLAN tag to packet*/144 /** Add VLAN tag to frame */ 138 145 bool vlan_tag_add; 139 146 … … 143 150 /** Used milticast Receive addrress count */ 144 151 unsigned int multicast_ra_count; 145 146 /** PCI device ID */147 uint16_t device_id;148 152 149 153 /** The irq assigned */ … … 222 226 static int e1000_on_activating(nic_t *); 223 227 static int e1000_on_stopping(nic_t *); 224 static void e1000_ write_packet(nic_t *, packet_t *);228 static void e1000_send_frame(nic_t *, void *, size_t); 225 229 226 230 /** Commands to deal with interrupt … … 472 476 } 473 477 474 /** Get state of acceptance of weird packets478 /** Get state of acceptance of weird frames 475 479 * 476 480 * @param device Device to check … … 490 494 }; 491 495 492 /** Set acceptance of weird packets496 /** Set acceptance of weird frames 493 497 * 494 498 * @param device Device to update … … 674 678 } 675 679 676 /** Disable receiving packets for default address680 /** Disable receiving frames for default address 677 681 * 678 682 * @param e1000 E1000 data structure … … 686 690 } 687 691 688 /** Enable receiving packets for default address692 /** Enable receiving frames for default address 689 693 * 690 694 * @param e1000 E1000 data structure … … 746 750 } 747 751 748 /** Enable accepting of broadcast packets752 /** Enable accepting of broadcast frames 749 753 * 750 754 * @param e1000 E1000 data structure … … 758 762 } 759 763 760 /** Disable accepting of broadcast packets764 /** Disable accepting of broadcast frames 761 765 * 762 766 * @param e1000 E1000 data structure … … 794 798 } 795 799 796 /** Set multicast packets acceptance mode800 /** Set multicast frames acceptance mode 797 801 * 798 802 * @param nic NIC device to update … … 848 852 } 849 853 850 /** Set unicast packets acceptance mode854 /** Set unicast frames acceptance mode 851 855 * 852 856 * @param nic NIC device to update … … 906 910 } 907 911 908 /** Set broadcast packets acceptance mode912 /** Set broadcast frames acceptance mode 909 913 * 910 914 * @param nic NIC device to update … … 991 995 if (vlan_mask) { 992 996 /* 993 * Disable receiving, so that packetmatching997 * Disable receiving, so that frame matching 994 998 * partially written VLAN is not received. 995 999 */ … … 1058 1062 } 1059 1063 1060 /** Fill receive descriptor with new empty packet1061 * 1062 * Store packet in e1000->rx_ring_packets1064 /** Fill receive descriptor with new empty buffer 1065 * 1066 * Store frame in e1000->rx_frame_phys 1063 1067 * 1064 1068 * @param nic NIC data stricture … … 1069 1073 { 1070 1074 e1000_t *e1000 = DRIVER_DATA_NIC(nic); 1071 packet_t *packet = 1072 nic_alloc_packet(nic, E1000_MAX_RECEIVE_PACKET_SIZE); 1073 1074 assert(packet); 1075 1076 *(e1000->rx_ring_packets + offset) = packet; 1075 1077 1076 e1000_rx_descriptor_t *rx_descriptor = (e1000_rx_descriptor_t *) 1078 1077 (e1000->rx_ring_virt + offset * sizeof(e1000_rx_descriptor_t)); 1079 1078 1080 void *phys; 1081 int rc = 1082 nic_dma_lock_packet(packet, E1000_MAX_RECEIVE_PACKET_SIZE, &phys); 1083 1084 if (rc == EOK) 1085 rx_descriptor->phys_addr = PTR_TO_U64(phys + packet->data_start); 1086 else 1087 rx_descriptor->phys_addr = 0; 1088 1079 rx_descriptor->phys_addr = PTR_TO_U64(e1000->rx_frame_phys[offset]); 1089 1080 rx_descriptor->length = 0; 1090 1081 rx_descriptor->checksum = 0; … … 1124 1115 e1000_tx_descriptor_t *tx_descriptor = (e1000_tx_descriptor_t *) 1125 1116 (e1000->tx_ring_virt + offset * sizeof(e1000_tx_descriptor_t)); 1126 1127 if (tx_descriptor->length) {1128 packet_t *old_packet = *(e1000->tx_ring_packets + offset);1129 if (old_packet)1130 nic_release_packet(nic, old_packet);1131 }1132 1117 1133 1118 tx_descriptor->phys_addr = 0; … … 1156 1141 } 1157 1142 1158 /** Receive packets1143 /** Receive frames 1159 1144 * 1160 1145 * @param nic NIC data 1161 1146 * 1162 1147 */ 1163 static void e1000_receive_ packets(nic_t *nic)1148 static void e1000_receive_frames(nic_t *nic) 1164 1149 { 1165 1150 e1000_t *e1000 = DRIVER_DATA_NIC(nic); … … 1168 1153 1169 1154 uint32_t *tail_addr = E1000_REG_ADDR(e1000, E1000_RDT); 1170 uint32_t next_tail = e1000_inc_tail(*tail_addr, E1000_RX_ PACKETS_COUNT);1155 uint32_t next_tail = e1000_inc_tail(*tail_addr, E1000_RX_FRAME_COUNT); 1171 1156 1172 1157 e1000_rx_descriptor_t *rx_descriptor = (e1000_rx_descriptor_t *) … … 1174 1159 1175 1160 while (rx_descriptor->status & 0x01) { 1176 uint32_t packet_size = rx_descriptor->length - E1000_CRC_SIZE;1161 uint32_t frame_size = rx_descriptor->length - E1000_CRC_SIZE; 1177 1162 1178 packet_t *packet = *(e1000->rx_ring_packets + next_tail); 1179 packet_suffix(packet, packet_size); 1180 1181 nic_dma_unlock_packet(packet, E1000_MAX_RECEIVE_PACKET_SIZE); 1182 nic_received_packet(nic, packet); 1163 nic_frame_t *frame = nic_alloc_frame(nic, frame_size); 1164 if (frame != NULL) { 1165 memcpy(frame->data, e1000->rx_frame_virt[next_tail], frame_size); 1166 nic_received_frame(nic, frame); 1167 } else { 1168 ddf_msg(LVL_ERROR, "Memory allocation failed. Frame dropped."); 1169 } 1183 1170 1184 1171 e1000_fill_new_rx_descriptor(nic, next_tail); 1185 1172 1186 *tail_addr = e1000_inc_tail(*tail_addr, E1000_RX_ PACKETS_COUNT);1187 next_tail = e1000_inc_tail(*tail_addr, E1000_RX_ PACKETS_COUNT);1173 *tail_addr = e1000_inc_tail(*tail_addr, E1000_RX_FRAME_COUNT); 1174 next_tail = e1000_inc_tail(*tail_addr, E1000_RX_FRAME_COUNT); 1188 1175 1189 1176 rx_descriptor = (e1000_rx_descriptor_t *) … … 1226 1213 { 1227 1214 if (icr & ICR_RXT0) 1228 e1000_receive_ packets(nic);1215 e1000_receive_frames(nic); 1229 1216 } 1230 1217 … … 1275 1262 } 1276 1263 1277 /** Force receiving all packets in the receive buffer1264 /** Force receiving all frames in the receive buffer 1278 1265 * 1279 1266 * @param nic NIC data … … 1348 1335 static void e1000_initialize_rx_registers(e1000_t *e1000) 1349 1336 { 1350 E1000_REG_WRITE(e1000, E1000_RDLEN, E1000_RX_ PACKETS_COUNT * 16);1337 E1000_REG_WRITE(e1000, E1000_RDLEN, E1000_RX_FRAME_COUNT * 16); 1351 1338 E1000_REG_WRITE(e1000, E1000_RDH, 0); 1352 1339 1353 1340 /* It is not posible to let HW use all descriptors */ 1354 E1000_REG_WRITE(e1000, E1000_RDT, E1000_RX_ PACKETS_COUNT - 1);1341 E1000_REG_WRITE(e1000, E1000_RDT, E1000_RX_FRAME_COUNT - 1); 1355 1342 1356 1343 /* Set Broadcast Enable Bit */ … … 1372 1359 1373 1360 int rc = dmamem_map_anonymous( 1374 E1000_RX_ PACKETS_COUNT * sizeof(e1000_rx_descriptor_t),1361 E1000_RX_FRAME_COUNT * sizeof(e1000_rx_descriptor_t), 1375 1362 AS_AREA_READ | AS_AREA_WRITE, 0, &e1000->rx_ring_phys, 1376 1363 &e1000->rx_ring_virt); … … 1383 1370 (uint32_t) PTR_TO_U64(e1000->rx_ring_phys)); 1384 1371 1385 e1000->rx_ring_packets = 1386 malloc(E1000_RX_PACKETS_COUNT * sizeof(packet_t *)); 1387 // FIXME: Check return value 1388 1372 e1000->rx_frame_phys = 1373 calloc(E1000_RX_FRAME_COUNT, sizeof(void *)); 1374 e1000->rx_frame_virt = 1375 calloc(E1000_RX_FRAME_COUNT, sizeof(void *)); 1376 if (e1000->rx_frame_phys == NULL || e1000->rx_frame_virt == NULL) { 1377 rc = ENOMEM; 1378 goto error; 1379 } 1380 1381 size_t i; 1382 void *frame_virt; 1383 void *frame_phys; 1384 1385 for (i = 0; i < E1000_RX_FRAME_COUNT; i++) { 1386 rc = dmamem_map_anonymous( 1387 E1000_MAX_SEND_FRAME_SIZE, AS_AREA_READ | AS_AREA_WRITE, 1388 0, &frame_phys, &frame_virt); 1389 if (rc != EOK) 1390 goto error; 1391 1392 e1000->rx_frame_virt[i] = frame_virt; 1393 e1000->rx_frame_phys[i] = frame_phys; 1394 } 1395 1396 /* Write descriptor */ 1397 for (i = 0; i < E1000_RX_FRAME_COUNT; i++) 1398 e1000_fill_new_rx_descriptor(nic, i); 1399 1400 e1000_initialize_rx_registers(e1000); 1401 1402 fibril_mutex_unlock(&e1000->rx_lock); 1403 return EOK; 1404 error: 1405 for (i = 0; i < E1000_RX_FRAME_COUNT; i++) { 1406 if (e1000->rx_frame_virt[i] != NULL) { 1407 dmamem_unmap_anonymous(e1000->rx_frame_virt[i]); 1408 e1000->rx_frame_virt[i] = NULL; 1409 e1000->rx_frame_phys[i] = NULL; 1410 } 1411 } 1412 if (e1000->rx_frame_phys != NULL) { 1413 free(e1000->rx_frame_phys); 1414 e1000->rx_frame_phys = NULL; 1415 } 1416 if (e1000->rx_frame_virt != NULL) { 1417 free(e1000->rx_frame_virt); 1418 e1000->rx_frame_phys = NULL; 1419 } 1420 return rc; 1421 } 1422 1423 /** Uninitialize receive structure 1424 * 1425 * @param nic NIC data 1426 * 1427 */ 1428 static void e1000_uninitialize_rx_structure(nic_t *nic) 1429 { 1430 e1000_t *e1000 = DRIVER_DATA_NIC(nic); 1431 1432 /* Write descriptor */ 1433 for (unsigned int offset = 0; offset < E1000_RX_FRAME_COUNT; offset++) { 1434 dmamem_unmap_anonymous(e1000->rx_frame_virt[offset]); 1435 e1000->rx_frame_virt[offset] = NULL; 1436 e1000->rx_frame_phys[offset] = NULL; 1437 } 1438 1439 free(e1000->rx_frame_virt); 1440 free(e1000->rx_frame_phys); 1441 e1000->rx_frame_virt = NULL; 1442 e1000->rx_frame_phys = NULL; 1443 dmamem_unmap_anonymous(e1000->rx_ring_virt); 1444 } 1445 1446 /** Clear receive descriptor ring 1447 * 1448 * @param e1000 E1000 data 1449 * 1450 */ 1451 static void e1000_clear_rx_ring(e1000_t *e1000) 1452 { 1389 1453 /* Write descriptor */ 1390 1454 for (unsigned int offset = 0; 1391 offset < E1000_RX_PACKETS_COUNT; 1392 offset++) 1393 e1000_fill_new_rx_descriptor(nic, offset); 1394 1395 e1000_initialize_rx_registers(e1000); 1396 1397 fibril_mutex_unlock(&e1000->rx_lock); 1398 return EOK; 1399 } 1400 1401 /** Uninitialize receive structure 1402 * 1403 * @param nic NIC data 1404 * 1405 */ 1406 static void e1000_uninitialize_rx_structure(nic_t *nic) 1407 { 1408 e1000_t *e1000 = DRIVER_DATA_NIC(nic); 1409 1410 /* Write descriptor */ 1411 for (unsigned int offset = 0; 1412 offset < E1000_RX_PACKETS_COUNT; 1413 offset++) { 1414 packet_t *packet = *(e1000->rx_ring_packets + offset); 1415 nic_dma_unlock_packet(packet, E1000_MAX_RECEIVE_PACKET_SIZE); 1416 nic_release_packet(nic, packet); 1417 } 1418 1419 free(e1000->rx_ring_packets); 1420 dmamem_unmap_anonymous(e1000->rx_ring_virt); 1421 } 1422 1423 /** Clear receive descriptor ring 1424 * 1425 * @param e1000 E1000 data 1426 * 1427 */ 1428 static void e1000_clear_rx_ring(e1000_t *e1000) 1429 { 1430 /* Write descriptor */ 1431 for (unsigned int offset = 0; 1432 offset < E1000_RX_PACKETS_COUNT; 1455 offset < E1000_RX_FRAME_COUNT; 1433 1456 offset++) 1434 1457 e1000_clear_rx_descriptor(e1000, offset); … … 1499 1522 static void e1000_initialize_tx_registers(e1000_t *e1000) 1500 1523 { 1501 E1000_REG_WRITE(e1000, E1000_TDLEN, E1000_TX_ PACKETS_COUNT * 16);1524 E1000_REG_WRITE(e1000, E1000_TDLEN, E1000_TX_FRAME_COUNT * 16); 1502 1525 E1000_REG_WRITE(e1000, E1000_TDH, 0); 1503 1526 E1000_REG_WRITE(e1000, E1000_TDT, 0); … … 1521 1544 static int e1000_initialize_tx_structure(e1000_t *e1000) 1522 1545 { 1546 size_t i; 1547 1523 1548 fibril_mutex_lock(&e1000->tx_lock); 1524 1549 1550 e1000->tx_ring_phys = NULL; 1551 e1000->tx_ring_virt = NULL; 1552 e1000->tx_frame_phys = NULL; 1553 e1000->tx_frame_virt = NULL; 1554 1525 1555 int rc = dmamem_map_anonymous( 1526 E1000_TX_ PACKETS_COUNT * sizeof(e1000_tx_descriptor_t),1556 E1000_TX_FRAME_COUNT * sizeof(e1000_tx_descriptor_t), 1527 1557 AS_AREA_READ | AS_AREA_WRITE, 0, &e1000->tx_ring_phys, 1528 1558 &e1000->tx_ring_virt); 1529 1559 if (rc != EOK) 1530 return rc;1560 goto error; 1531 1561 1532 1562 bzero(e1000->tx_ring_virt, 1533 E1000_TX_PACKETS_COUNT * sizeof(e1000_tx_descriptor_t)); 1563 E1000_TX_FRAME_COUNT * sizeof(e1000_tx_descriptor_t)); 1564 1565 e1000->tx_frame_phys = calloc(E1000_TX_FRAME_COUNT, sizeof(void *)); 1566 e1000->tx_frame_virt = calloc(E1000_TX_FRAME_COUNT, sizeof(void *)); 1567 1568 if (e1000->tx_frame_phys == NULL || e1000->tx_frame_virt == NULL) { 1569 rc = ENOMEM; 1570 goto error; 1571 } 1572 1573 for (i = 0; i < E1000_TX_FRAME_COUNT; i++) { 1574 rc = dmamem_map_anonymous( 1575 E1000_MAX_SEND_FRAME_SIZE, AS_AREA_READ | AS_AREA_WRITE, 1576 0, &e1000->tx_frame_phys[i], &e1000->tx_frame_virt[i]); 1577 if (rc != EOK) 1578 goto error; 1579 } 1534 1580 1535 1581 E1000_REG_WRITE(e1000, E1000_TDBAH, … … 1538 1584 (uint32_t) PTR_TO_U64(e1000->tx_ring_phys)); 1539 1585 1540 e1000->tx_ring_packets =1541 malloc(E1000_TX_PACKETS_COUNT * sizeof(packet_t *));1542 // FIXME: Check return value1543 1544 1586 e1000_initialize_tx_registers(e1000); 1545 1587 1546 1588 fibril_mutex_unlock(&e1000->tx_lock); 1547 1589 return EOK; 1590 1591 error: 1592 if (e1000->tx_ring_virt != NULL) { 1593 dmamem_unmap_anonymous(e1000->tx_ring_virt); 1594 e1000->tx_ring_virt = NULL; 1595 } 1596 1597 if (e1000->tx_frame_phys != NULL && e1000->tx_frame_virt != NULL) { 1598 for (i = 0; i < E1000_TX_FRAME_COUNT; i++) { 1599 if (e1000->tx_frame_virt[i] != NULL) { 1600 dmamem_unmap_anonymous(e1000->tx_frame_virt[i]); 1601 e1000->tx_frame_virt[i] = NULL; 1602 e1000->tx_frame_phys[i] = NULL; 1603 } 1604 } 1605 } 1606 1607 if (e1000->tx_frame_phys != NULL) { 1608 free(e1000->tx_frame_phys); 1609 e1000->tx_frame_phys = NULL; 1610 } 1611 1612 if (e1000->tx_frame_virt != NULL) { 1613 free(e1000->tx_frame_virt); 1614 e1000->tx_frame_phys = NULL; 1615 } 1616 1617 return rc; 1548 1618 } 1549 1619 … … 1555 1625 static void e1000_uninitialize_tx_structure(e1000_t *e1000) 1556 1626 { 1557 free(e1000->tx_ring_packets); 1627 size_t i; 1628 1629 for (i = 0; i < E1000_TX_FRAME_COUNT; i++) { 1630 dmamem_unmap_anonymous(e1000->tx_frame_virt[i]); 1631 e1000->tx_frame_virt[i] = NULL; 1632 e1000->tx_frame_phys[i] = NULL; 1633 } 1634 1635 if (e1000->tx_frame_phys != NULL) { 1636 free(e1000->tx_frame_phys); 1637 e1000->tx_frame_phys = NULL; 1638 } 1639 1640 if (e1000->tx_frame_virt != NULL) { 1641 free(e1000->tx_frame_virt); 1642 e1000->tx_frame_phys = NULL; 1643 } 1558 1644 dmamem_unmap_anonymous(e1000->tx_ring_virt); 1559 1645 } … … 1568 1654 /* Write descriptor */ 1569 1655 for (unsigned int offset = 0; 1570 offset < E1000_TX_ PACKETS_COUNT;1656 offset < E1000_TX_FRAME_COUNT; 1571 1657 offset++) 1572 1658 e1000_clear_tx_descriptor(nic, offset); … … 1625 1711 } 1626 1712 1627 /** Activate the device to receive and transmit packets1713 /** Activate the device to receive and transmit frames 1628 1714 * 1629 1715 * @param nic NIC driver data … … 1770 1856 1771 1857 nic_set_specific(nic, e1000); 1772 nic_set_ write_packet_handler(nic, e1000_write_packet);1858 nic_set_send_frame_handler(nic, e1000_send_frame); 1773 1859 nic_set_state_change_handlers(nic, e1000_on_activating, 1774 1860 e1000_on_down, e1000_on_stopping); … … 1888 1974 /* Allocate driver data for the device. */ 1889 1975 e1000_t *e1000 = e1000_create_dev_data(dev); 1890 if (e1000 == NULL) 1976 if (e1000 == NULL) { 1977 ddf_msg(LVL_ERROR, "Unable to allocate device softstate"); 1891 1978 return ENOMEM; 1979 } 1892 1980 1893 1981 /* Obtain and fill hardware resources info */ 1894 1982 int rc = e1000_get_resource_info(dev); 1895 1983 if (rc != EOK) { 1984 ddf_msg(LVL_ERROR, "Cannot obtain hardware resources"); 1896 1985 e1000_dev_cleanup(dev); 1897 1986 return rc; 1898 1987 } 1899 1988 1989 uint16_t device_id; 1900 1990 rc = pci_config_space_read_16(dev->parent_sess, PCI_DEVICE_ID, 1901 & e1000->device_id);1991 &device_id); 1902 1992 if (rc != EOK) { 1993 ddf_msg(LVL_ERROR, "Cannot access PCI configuration space"); 1903 1994 e1000_dev_cleanup(dev); 1904 1995 return rc; 1996 } 1997 1998 e1000_board_t board; 1999 switch (device_id) { 2000 case 0x100e: 2001 case 0x1015: 2002 case 0x1016: 2003 case 0x1017: 2004 board = E1000_82540; 2005 break; 2006 case 0x1013: 2007 case 0x1018: 2008 case 0x1078: 2009 board = E1000_82541; 2010 break; 2011 case 0x1076: 2012 case 0x1077: 2013 case 0x107c: 2014 board = E1000_82541REV2; 2015 break; 2016 case 0x100f: 2017 case 0x1011: 2018 case 0x1026: 2019 case 0x1027: 2020 case 0x1028: 2021 board = E1000_82545; 2022 break; 2023 case 0x1010: 2024 case 0x1012: 2025 case 0x101d: 2026 case 0x1079: 2027 case 0x107a: 2028 case 0x107b: 2029 board = E1000_82546; 2030 break; 2031 case 0x1019: 2032 case 0x101a: 2033 board = E1000_82547; 2034 break; 2035 case 0x10b9: 2036 board = E1000_82572; 2037 break; 2038 case 0x1096: 2039 board = E1000_80003ES2; 2040 break; 2041 default: 2042 ddf_msg(LVL_ERROR, "Device not supported (%#" PRIx16 ")", 2043 device_id); 2044 e1000_dev_cleanup(dev); 2045 return ENOTSUP; 2046 } 2047 2048 switch (board) { 2049 case E1000_82540: 2050 case E1000_82541: 2051 case E1000_82541REV2: 2052 case E1000_82545: 2053 case E1000_82546: 2054 case E1000_82572: 2055 e1000->info.eerd_start = 0x01; 2056 e1000->info.eerd_done = 0x10; 2057 e1000->info.eerd_address_offset = 8; 2058 e1000->info.eerd_data_offset = 16; 2059 break; 2060 case E1000_82547: 2061 case E1000_80003ES2: 2062 e1000->info.eerd_start = 0x01; 2063 e1000->info.eerd_done = 0x02; 2064 e1000->info.eerd_address_offset = 2; 2065 e1000->info.eerd_data_offset = 16; 2066 break; 1905 2067 } 1906 2068 … … 1935 2097 int e1000_dev_add(ddf_dev_t *dev) 1936 2098 { 2099 ddf_fun_t *fun; 1937 2100 assert(dev); 1938 2101 … … 1965 2128 e1000_initialize_vlan(e1000); 1966 2129 1967 rc = nic_register_as_ddf_fun(nic, &e1000_dev_ops);1968 if ( rc != EOK)2130 fun = ddf_fun_create(nic_get_ddf_dev(nic), fun_exposed, "port0"); 2131 if (fun == NULL) 1969 2132 goto err_tx_structure; 2133 nic_set_ddf_fun(nic, fun); 2134 fun->ops = &e1000_dev_ops; 2135 fun->driver_data = nic; 1970 2136 1971 2137 rc = e1000_register_int_handler(nic); 1972 2138 if (rc != EOK) 1973 goto err_ tx_structure;2139 goto err_fun_create; 1974 2140 1975 2141 rc = nic_connect_to_services(nic); … … 1994 2160 goto err_rx_structure; 1995 2161 2162 rc = ddf_fun_bind(fun); 2163 if (rc != EOK) 2164 goto err_fun_bind; 2165 2166 rc = ddf_fun_add_to_category(fun, DEVICE_CATEGORY_NIC); 2167 if (rc != EOK) 2168 goto err_add_to_cat; 2169 1996 2170 return EOK; 1997 2171 2172 err_add_to_cat: 2173 ddf_fun_unbind(fun); 2174 err_fun_bind: 1998 2175 err_rx_structure: 1999 2176 e1000_uninitialize_rx_structure(nic); 2000 2177 err_irq: 2001 2178 unregister_interrupt_handler(dev, DRIVER_DATA_DEV(dev)->irq); 2179 err_fun_create: 2180 ddf_fun_destroy(fun); 2181 nic_set_ddf_fun(nic, NULL); 2002 2182 err_tx_structure: 2003 2183 e1000_uninitialize_tx_structure(e1000); … … 2023 2203 fibril_mutex_lock(&e1000->eeprom_lock); 2024 2204 2025 uint32_t eerd_done;2026 uint32_t eerd_address_offset;2027 2028 switch (e1000->device_id) {2029 case 0x107c:2030 case 0x1013:2031 case 0x1018:2032 case 0x1019:2033 case 0x101A:2034 case 0x1076:2035 case 0x1077:2036 case 0x1078:2037 case 0x10b9:2038 /* 82541xx and 82547GI/EI */2039 eerd_done = EERD_DONE_82541XX_82547GI_EI;2040 eerd_address_offset = EERD_ADDRESS_OFFSET_82541XX_82547GI_EI;2041 break;2042 default:2043 eerd_done = EERD_DONE;2044 eerd_address_offset = EERD_ADDRESS_OFFSET;2045 break;2046 }2047 2048 2205 /* Write address and START bit to EERD register */ 2049 uint32_t write_data = EERD_START | 2050 (((uint32_t) eeprom_address) << eerd_address_offset); 2206 uint32_t write_data = e1000->info.eerd_start | 2207 (((uint32_t) eeprom_address) << 2208 e1000->info.eerd_address_offset); 2051 2209 E1000_REG_WRITE(e1000, E1000_EERD, write_data); 2052 2210 2053 2211 uint32_t eerd = E1000_REG_READ(e1000, E1000_EERD); 2054 while ((eerd & e erd_done) == 0) {2212 while ((eerd & e1000->info.eerd_done) == 0) { 2055 2213 usleep(1); 2056 2214 eerd = E1000_REG_READ(e1000, E1000_EERD); … … 2059 2217 fibril_mutex_unlock(&e1000->eeprom_lock); 2060 2218 2061 return (uint16_t) (eerd >> EERD_DATA_OFFSET);2219 return (uint16_t) (eerd >> e1000->info.eerd_data_offset); 2062 2220 } 2063 2221 … … 2135 2293 } 2136 2294 2137 /** Send packet2295 /** Send frame 2138 2296 * 2139 2297 * @param nic NIC driver data structure 2140 * @param packet Packet to send 2298 * @param data Frame data 2299 * @param size Frame size in bytes 2141 2300 * 2142 2301 * @return EOK if succeed … … 2144 2303 * 2145 2304 */ 2146 static void e1000_ write_packet(nic_t *nic, packet_t *packet)2305 static void e1000_send_frame(nic_t *nic, void *data, size_t size) 2147 2306 { 2148 2307 assert(nic); … … 2162 2321 2163 2322 /* Descriptor done */ 2164 if (tx_descriptor_addr->status & TXDESCRIPTOR_STATUS_DD) {2323 if (tx_descriptor_addr->status & TXDESCRIPTOR_STATUS_DD) 2165 2324 descriptor_available = true; 2166 packet_t *old_packet = *(e1000->tx_ring_packets + tdt);2167 if (old_packet) {2168 size_t old_packet_size = packet_get_data_length(old_packet);2169 nic_dma_unlock_packet(old_packet, old_packet_size);2170 nic_release_packet(nic, old_packet);2171 }2172 }2173 2325 2174 2326 if (!descriptor_available) { 2175 /* Packetlost */2327 /* Frame lost */ 2176 2328 fibril_mutex_unlock(&e1000->tx_lock); 2177 2329 return; 2178 2330 } 2179 2331 2180 size_t packet_size = packet_get_data_length(packet); 2181 2182 void *phys; 2183 int rc = nic_dma_lock_packet(packet, packet_size, &phys); 2184 if (rc != EOK) { 2185 fibril_mutex_unlock(&e1000->tx_lock); 2186 return; 2187 } 2188 2189 *(e1000->tx_ring_packets + tdt) = packet; 2190 2191 tx_descriptor_addr->phys_addr = 2192 PTR_TO_U64(phys + packet->data_start); 2193 tx_descriptor_addr->length = packet_size; 2332 memcpy(e1000->tx_frame_virt[tdt], data, size); 2333 2334 tx_descriptor_addr->phys_addr = PTR_TO_U64(e1000->tx_frame_phys[tdt]); 2335 tx_descriptor_addr->length = size; 2194 2336 2195 2337 /* … … 2212 2354 2213 2355 tdt++; 2214 if (tdt == E1000_TX_ PACKETS_COUNT)2356 if (tdt == E1000_TX_FRAME_COUNT) 2215 2357 tdt = 0; 2216 2358 … … 2228 2370 nic_driver_implement(&e1000_driver_ops, &e1000_dev_ops, 2229 2371 &e1000_nic_iface); 2372 2373 ddf_log_init(NAME, LVL_ERROR); 2374 ddf_msg(LVL_NOTE, "HelenOS E1000 driver started"); 2230 2375 return ddf_driver_main(&e1000_driver); 2231 2376 }
Note:
See TracChangeset
for help on using the changeset viewer.