Changes in kernel/arch/ia32/src/ia32.c [4a5ba372:e98f1c3e] in mainline
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kernel/arch/ia32/src/ia32.c
r4a5ba372 re98f1c3e 36 36 37 37 #include <arch.h> 38 #include <arch/arch.h> 38 39 #include <typedefs.h> 39 40 #include <errno.h> … … 50 51 #include <genarch/drivers/ega/ega.h> 51 52 #include <genarch/drivers/i8042/i8042.h> 53 #include <genarch/drivers/ns16550/ns16550.h> 52 54 #include <genarch/drivers/legacy/ia32/io.h> 53 55 #include <genarch/fb/bfb.h> 54 56 #include <genarch/kbrd/kbrd.h> 57 #include <genarch/srln/srln.h> 55 58 #include <genarch/multiboot/multiboot.h> 56 59 #include <genarch/multiboot/multiboot2.h> 60 #include <arch/pm.h> 61 #include <arch/vreg.h> 57 62 58 63 #ifdef CONFIG_SMP 59 64 #include <arch/smp/apic.h> 60 65 #endif 66 67 static void ia32_pre_mm_init(void); 68 static void ia32_post_mm_init(void); 69 static void ia32_post_cpu_init(void); 70 static void ia32_pre_smp_init(void); 71 static void ia32_post_smp_init(void); 72 73 arch_ops_t ia32_ops = { 74 .pre_mm_init = ia32_pre_mm_init, 75 .post_mm_init = ia32_post_mm_init, 76 .post_cpu_init = ia32_post_cpu_init, 77 .pre_smp_init = ia32_pre_smp_init, 78 .post_smp_init = ia32_post_smp_init, 79 }; 80 81 arch_ops_t *arch_ops = &ia32_ops; 61 82 62 83 /** Perform ia32-specific initialization before main_bsp() is called. … … 66 87 * 67 88 */ 68 void arch_pre_main(uint32_t signature, void *info)89 void ia32_pre_main(uint32_t signature, void *info) 69 90 { 70 91 /* Parse multiboot information obtained from the bootloader. */ … … 79 100 } 80 101 81 void arch_pre_mm_init(void)102 void ia32_pre_mm_init(void) 82 103 { 83 104 pm_init(); … … 92 113 } 93 114 94 void arch_post_mm_init(void) 95 { 115 void ia32_post_mm_init(void) 116 { 117 vreg_init(); 118 96 119 if (config.cpu_active == 1) { 97 120 /* Initialize IRQ routing */ … … 122 145 } 123 146 124 void arch_post_cpu_init()147 void ia32_post_cpu_init(void) 125 148 { 126 149 #ifdef CONFIG_SMP … … 132 155 } 133 156 134 void arch_pre_smp_init(void)157 void ia32_pre_smp_init(void) 135 158 { 136 159 if (config.cpu_active == 1) { … … 141 164 } 142 165 143 void arch_post_smp_init(void)166 void ia32_post_smp_init(void) 144 167 { 145 168 /* Currently the only supported platform for ia32 is 'pc'. */ … … 166 189 } 167 190 #endif 191 192 #if (defined(CONFIG_NS16550) || defined(CONFIG_NS16550_OUT)) 193 /* 194 * Initialize the ns16550 controller. 195 */ 196 #ifdef CONFIG_NS16550_OUT 197 outdev_t *ns16550_out; 198 outdev_t **ns16550_out_ptr = &ns16550_out; 199 #else 200 outdev_t **ns16550_out_ptr = NULL; 201 #endif 202 ns16550_instance_t *ns16550_instance 203 = ns16550_init((ns16550_t *) NS16550_BASE, IRQ_NS16550, NULL, NULL, 204 ns16550_out_ptr); 205 if (ns16550_instance) { 206 #ifdef CONFIG_NS16550 207 srln_instance_t *srln_instance = srln_init(); 208 if (srln_instance) { 209 indev_t *sink = stdin_wire(); 210 indev_t *srln = srln_wire(srln_instance, sink); 211 ns16550_wire(ns16550_instance, srln); 212 trap_virtual_enable_irqs(1 << IRQ_NS16550); 213 } 214 #endif 215 #ifdef CONFIG_NS16550_OUT 216 if (ns16550_out) { 217 stdout_wire(ns16550_out); 218 } 219 #endif 220 } 221 #endif 168 222 169 223 if (irqs_info != NULL) … … 183 237 } 184 238 185 /** Set thread-local-storage pointer186 *187 * TLS pointer is set in GS register. That means, the GS contains188 * selector, and the descriptor->base is the correct address.189 */190 sysarg_t sys_tls_set(uintptr_t addr)191 {192 THREAD->arch.tls = addr;193 set_tls_desc(addr);194 195 return EOK;196 }197 198 239 /** Construct function pointer 199 240 *
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