Changeset eb522e8 in mainline for kernel/arch/arm32/src/exception.c


Ignore:
Timestamp:
2011-06-01T08:43:42Z (14 years ago)
Author:
Lubos Slovak <lubos.slovak@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
8d6c1f1
Parents:
9e2e715 (diff), e51a514 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Huuuuuge merge from development - all the work actually :)

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/arm32/src/exception.c

    r9e2e715 reb522e8  
    3535
    3636#include <arch/exception.h>
    37 #include <arch/memstr.h>
    3837#include <arch/regutils.h>
    3938#include <arch/machine_func.h>
     
    175174void istate_decode(istate_t *istate)
    176175{
    177         printf("r0 =%#0.8lx\tr1 =%#0.8lx\tr2 =%#0.8lx\tr3 =%#0.8lx\n",
     176        printf("r0 =%0#10" PRIx32 "\tr1 =%0#10" PRIx32 "\t"
     177            "r2 =%0#10" PRIx32 "\tr3 =%0#10" PRIx32 "\n",
    178178            istate->r0, istate->r1, istate->r2, istate->r3);
    179         printf("r4 =%#0.8lx\tr5 =%#0.8lx\tr6 =%#0.8lx\tr7 =%#0.8lx\n",
     179        printf("r4 =%0#10" PRIx32 "\tr5 =%0#10" PRIx32 "\t"
     180            "r6 =%0#10" PRIx32 "\tr7 =%0#10" PRIx32 "\n",
    180181            istate->r4, istate->r5, istate->r6, istate->r7);
    181         printf("r8 =%#0.8lx\tr9 =%#0.8lx\tr10=%#0.8lx\tfp =%#0.8lx\n",
     182        printf("r8 =%0#10" PRIx32 "\tr9 =%0#10" PRIx32 "\t"
     183            "r10=%0#10" PRIx32 "\tfp =%0#10" PRIx32 "\n",
    182184            istate->r8, istate->r9, istate->r10, istate->fp);
    183         printf("r12=%#0.8lx\tsp =%#0.8lx\tlr =%#0.8lx\tspsr=%#0.8lx\n",
     185        printf("r12=%0#10" PRIx32 "\tsp =%0#10" PRIx32 "\t"
     186            "lr =%0#10" PRIx32 "\tspsr=%0#10" PRIx32 "\n",
    184187            istate->r12, istate->sp, istate->lr, istate->spsr);
    185188}
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