Changeset ec08286 in mainline for kernel/arch/arm32/src/mach/gta02/gta02.c
- Timestamp:
- 2010-07-25T14:35:05Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 277cf60
- Parents:
- 24697c3
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/src/mach/gta02/gta02.c
r24697c3 rec08286 43 43 #include <genarch/drivers/s3c24xx_irqc/s3c24xx_irqc.h> 44 44 #include <genarch/drivers/s3c24xx_timer/s3c24xx_timer.h> 45 #include <genarch/srln/srln.h> 45 46 #include <interrupt.h> 46 47 #include <ddi/ddi.h> … … 75 76 76 77 static void *gta02_scons_out; 77 static s3c24xx_irqc_t *gta02_irqc; 78 static outdev_t *gta02_scons_dev; 79 static s3c24xx_irqc_t gta02_irqc; 78 80 static s3c24xx_timer_t *gta02_timer; 79 81 … … 93 95 static void gta02_init(void) 94 96 { 97 s3c24xx_irqc_regs_t *irqc_regs; 98 95 99 gta02_scons_out = (void *) hw_map(GTA02_SCONS_BASE, PAGE_SIZE); 96 gta02_irqc = (void *) hw_map(S3C24XX_IRQC_ADDRESS, PAGE_SIZE);97 100 gta02_timer = (void *) hw_map(S3C24XX_TIMER_ADDRESS, PAGE_SIZE); 98 99 /* Make all interrupt sources use IRQ mode (not FIQ). */ 100 pio_write_32(>a02_irqc->intmod, 0x00000000); 101 102 /* Disable all interrupt sources. */ 103 pio_write_32(>a02_irqc->intmsk, 0xffffffff); 104 105 /* Disable interrupts from all sub-sources. */ 106 pio_write_32(>a02_irqc->intsubmsk, 0xffffffff); 101 irqc_regs = (void *) hw_map(S3C24XX_IRQC_ADDRESS, PAGE_SIZE); 102 103 /* Initialize interrupt controller. */ 104 s3c24xx_irqc_init(>a02_irqc, irqc_regs); 107 105 } 108 106 … … 132 130 uint32_t inum; 133 131 134 inum = pio_read_32(>a02_irqc->intoffset); 132 /* Determine IRQ number. */ 133 inum = s3c24xx_irqc_inum_get(>a02_irqc); 134 135 /* Clear interrupt condition in the interrupt controller. */ 136 s3c24xx_irqc_clear(>a02_irqc, inum); 135 137 136 138 irq_t *irq = irq_dispatch_and_lock(inum); … … 144 146 CPU->id, inum); 145 147 } 146 147 /* Clear interrupt condition in the interrupt controller. */148 pio_write_32(>a02_irqc->srcpnd, S3C24XX_INT_BIT(inum));149 pio_write_32(>a02_irqc->intpnd, S3C24XX_INT_BIT(inum));150 148 } 151 149 … … 176 174 } 177 175 #endif 178 outdev_t *scons_dev; 179 180 scons_dev = s3c24xx_uart_init((ioport8_t *) gta02_scons_out); 181 if (scons_dev) 182 stdout_wire(scons_dev); 176 177 /* Initialize serial port of the debugging console. */ 178 gta02_scons_dev = s3c24xx_uart_init((ioport8_t *) gta02_scons_out, 179 S3C24XX_INT_UART2); 180 if (gta02_scons_dev) { 181 182 /* Create output device. */ 183 stdout_wire(gta02_scons_dev); 184 } 183 185 } 184 186 185 187 static void gta02_input_init(void) 186 188 { 189 s3c24xx_uart_instance_t *scons_inst; 190 191 if (gta02_scons_dev) { 192 /* Create input device. */ 193 scons_inst = (void *) gta02_scons_dev->data; 194 195 srln_instance_t *srln_instance = srln_init(); 196 if (srln_instance) { 197 indev_t *sink = stdin_wire(); 198 indev_t *srln = srln_wire(srln_instance, sink); 199 s3c24xx_uart_input_wire(scons_inst, srln); 200 201 /* Enable interrupts from UART2 */ 202 s3c24xx_irqc_src_enable(>a02_irqc, 203 S3C24XX_INT_UART2); 204 205 /* Enable interrupts from UART2 RXD */ 206 s3c24xx_irqc_subsrc_enable(>a02_irqc, 207 S3C24XX_SUBINT_RXD2); 208 } 209 } 187 210 } 188 211 … … 248 271 249 272 /* Enable interrupts from timer0 */ 250 pio_write_32(>a02_irqc->intmsk, pio_read_32(>a02_irqc->intmsk) & 251 ~S3C24XX_INT_BIT(S3C24XX_INT_TIMER0)); 273 s3c24xx_irqc_src_enable(>a02_irqc, S3C24XX_INT_TIMER0); 252 274 253 275 /* Load data from tcntb0/tcmpb0 into tcnt0/tcmp0. */
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