Changeset eedf4c5 in mainline


Ignore:
Timestamp:
2010-07-01T22:27:45Z (14 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
dbd4ae5
Parents:
d5042d28
Message:

switch to C-style comments

File:
1 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/ppc32/src/asm.S

    rd5042d28 reedf4c5  
    1 #
    2 # Copyright (c) 2005 Martin Decky
    3 # All rights reserved.
    4 #
    5 # Redistribution and use in source and binary forms, with or without
    6 # modification, are permitted provided that the following conditions
    7 # are met:
    8 #
    9 # - Redistributions of source code must retain the above copyright
    10 #   notice, this list of conditions and the following disclaimer.
    11 # - Redistributions in binary form must reproduce the above copyright
    12 #   notice, this list of conditions and the following disclaimer in the
    13 #   documentation and/or other materials provided with the distribution.
    14 # - The name of the author may not be used to endorse or promote products
    15 #   derived from this software without specific prior written permission.
    16 #
    17 # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
    18 # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
    19 # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
    20 # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
    21 # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
    22 # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
    23 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
    24 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
    25 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
    26 # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    27 #
     1/*
     2 * Copyright (c) 2005 Martin Decky
     3 * All rights reserved.
     4 *
     5 * Redistribution and use in source and binary forms, with or without
     6 * modification, are permitted provided that the following conditions
     7 * are met:
     8 *
     9 * - Redistributions of source code must retain the above copyright
     10 *   notice, this list of conditions and the following disclaimer.
     11 * - Redistributions in binary form must reproduce the above copyright
     12 *   notice, this list of conditions and the following disclaimer in the
     13 *   documentation and/or other materials provided with the distribution.
     14 * - The name of the author may not be used to endorse or promote products
     15 *   derived from this software without specific prior written permission.
     16 *
     17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27 */
    2828
    2929#include <arch/asm/regname.h>
    … …  
    4242.global memcpy_from_uspace_failover_address
    4343.global memcpy_to_uspace_failover_address
     44.global early_putchar
    4445
    4546userspace_asm:
    4647       
    47         # r3 = uspace_uarg
    48         # r4 = stack
    49         # r5 = entry
    50        
    51         # disable interrupts
     48        /*
     49         * r3 = uspace_uarg
     50         * r4 = stack
     51         * r5 = entry
     52         */
     53       
     54        /* Disable interrupts */
    5255       
    5356        mfmsr r31
    … …  
    5558        mtmsr r31
    5659       
    57         # set entry point
     60        /* Set entry point */
    5861       
    5962        mtsrr0 r5
    6063       
    61         # set problem state, enable interrupts
     64        /* Set problem state, enable interrupts */
    6265       
    6366        ori r31, r31, MSR_PR
    … …  
    6568        mtsrr1 r31
    6669       
    67         # set stack
     70        /* Set stack */
    6871       
    6972        mr sp, r4
    7073       
    71         # %r6 is defined to hold pcb_ptr - set it to 0
     74        /* %r6 is defined to hold pcb_ptr - set it to 0 */
    7275       
    7376        xor r6, r6, r6
    7477       
    75         # jump to userspace
     78        /* Jump to userspace */
    7679       
    7780        rfi
    … …  
    7982iret:
    8083       
    81         # disable interrupts
     84        /* Disable interrupts */
    8285       
    8386        mfmsr r31
    … …  
    141144iret_syscall:
    142145       
    143         # reset decrementer
     146        /* Reset decrementer */
    144147       
    145148        li r31, 1000
    146149        mtdec r31
    147150       
    148         # disable interrupts
     151        /* Disable interrupts */
    149152       
    150153        mfmsr r31
    … …  
    278281memcpy_from_uspace_failover_address:
    279282memcpy_to_uspace_failover_address:
    280         # return zero, failure
     283        /* Return zero, failure */
    281284        xor r3, r3, r3
    282285        blr
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