Changeset eef14771 in mainline
- Timestamp:
- 2013-05-05T21:34:14Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 06fe3b6, 44ecf89
- Parents:
- 716357f (diff), 69483af (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - Files:
-
- 2 added
- 3 deleted
- 6 edited
- 1 moved
Legend:
- Unmodified
- Added
- Removed
-
HelenOS.config
r716357f reef14771 487 487 ! [PLATFORM=arm32&MACHINE=gta02] CONFIG_S3C24XX_IRQC (y) 488 488 489 % Support for TI AM335x on-chip UART490 ! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&PLATFORM=arm32&MACHINE=beaglebone] CONFIG_AM335X_UART (y/n)491 492 489 % Support for TI AM335x timers support 493 490 ! [PLATFORM=arm32&MACHINE=beaglebone] CONFIG_AM335X_TIMERS (y) 494 491 495 % Support for TI AMDM37xon-chip UART496 ! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&PLATFORM=arm32& MACHINE=beagleboardxm] CONFIG_AMDM37X_UART (y/n)492 % Support for OMAP on-chip UART 493 ! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&PLATFORM=arm32&(MACHINE=beagleboardxm|MACHINE=beaglebone)] CONFIG_OMAP_UART (y/n) 497 494 498 495 % Support for i8042 controller … … 515 512 516 513 % Serial line input module 517 ! [CONFIG_DSRLNIN=y|(PLATFORM=arm32&MACHINE=gta02)|(PLATFORM=arm32&MACHINE=integratorcp&CONFIG_ARM926_UART=y)|(PLATFORM=arm32&MACHINE=beaglebone&CONFIG_ AM335X_UART=y)|(PLATFORM=arm32&MACHINE=beagleboardxm&CONFIG_AMDM37X_UART=y)|(PLATFORM=ia64&MACHINE=i460GX&CONFIG_NS16550=y)|(PLATFORM=ia64&MACHINE=ski)|(PLATFORM=sparc64&PROCESSOR=sun4v)] CONFIG_SRLN (y)514 ! [CONFIG_DSRLNIN=y|(PLATFORM=arm32&MACHINE=gta02)|(PLATFORM=arm32&MACHINE=integratorcp&CONFIG_ARM926_UART=y)|(PLATFORM=arm32&MACHINE=beaglebone&CONFIG_OMAP_UART=y)|(PLATFORM=arm32&MACHINE=beagleboardxm&CONFIG_OMAP_UART=y)|(PLATFORM=ia64&MACHINE=i460GX&CONFIG_NS16550=y)|(PLATFORM=ia64&MACHINE=ski)|(PLATFORM=sparc64&PROCESSOR=sun4v)] CONFIG_SRLN (y) 518 515 519 516 % EGA support -
kernel/arch/arm32/src/mach/beagleboardxm/beagleboardxm.c
r716357f reef14771 61 61 static struct beagleboard { 62 62 amdm37x_irc_regs_t *irc_addr; 63 amdm37x_uart_t uart;63 omap_uart_t uart; 64 64 amdm37x_gpt_t timer; 65 65 } beagleboard; … … 167 167 static void bbxm_output_init(void) 168 168 { 169 #ifdef CONFIG_OMAP_UART 169 170 /* UART3 is wired to external RS232 connector */ 170 const bool ok = amdm37x_uart_init(&beagleboard.uart,171 const bool ok = omap_uart_init(&beagleboard.uart, 171 172 AMDM37x_UART3_IRQ, AMDM37x_UART3_BASE_ADDRESS, AMDM37x_UART3_SIZE); 172 173 if (ok) { 173 174 stdout_wire(&beagleboard.uart.outdev); 174 175 } 176 #endif 175 177 } 176 178 177 179 static void bbxm_input_init(void) 178 180 { 181 #ifdef CONFIG_OMAP_UART 179 182 srln_instance_t *srln_instance = srln_init(); 180 183 if (srln_instance) { 181 184 indev_t *sink = stdin_wire(); 182 185 indev_t *srln = srln_wire(srln_instance, sink); 183 amdm37x_uart_input_wire(&beagleboard.uart, srln);186 omap_uart_input_wire(&beagleboard.uart, srln); 184 187 amdm37x_irc_enable(beagleboard.irc_addr, AMDM37x_UART3_IRQ); 185 188 } 189 #endif 186 190 } 187 191 -
kernel/arch/arm32/src/mach/beaglebone/beaglebone.c
r716357f reef14771 68 68 am335x_ctrl_module_t *ctrl_module; 69 69 am335x_timer_t timer; 70 am335x_uart_t uart;70 omap_uart_t uart; 71 71 } bbone; 72 72 … … 195 195 static void bbone_output_init(void) 196 196 { 197 const bool ok = am335x_uart_init(&bbone.uart, 197 #ifdef CONFIG_OMAP_UART 198 const bool ok = omap_uart_init(&bbone.uart, 198 199 AM335x_UART0_IRQ, AM335x_UART0_BASE_ADDRESS, 199 200 AM335x_UART0_SIZE); … … 201 202 if (ok) 202 203 stdout_wire(&bbone.uart.outdev); 204 #endif 203 205 } 204 206 205 207 static void bbone_input_init(void) 206 208 { 209 #ifdef CONFIG_OMAP_UART 207 210 srln_instance_t *srln_instance = srln_init(); 208 211 if (srln_instance) { 209 212 indev_t *sink = stdin_wire(); 210 213 indev_t *srln = srln_wire(srln_instance, sink); 211 am335x_uart_input_wire(&bbone.uart, srln);214 omap_uart_input_wire(&bbone.uart, srln); 212 215 am335x_irc_enable(bbone.irc_addr, AM335x_UART0_IRQ); 213 216 } 217 #endif 214 218 } 215 219 -
kernel/genarch/Makefile.inc
r716357f reef14771 105 105 endif 106 106 107 ifeq ($(CONFIG_ AM335X_UART),y)107 ifeq ($(CONFIG_OMAP_UART),y) 108 108 GENARCH_SOURCES += \ 109 genarch/src/drivers/ am335x/uart.c109 genarch/src/drivers/omap/uart.c 110 110 endif 111 111 … … 113 113 GENARCH_SOURCES += \ 114 114 genarch/src/drivers/am335x/timer.c 115 endif116 117 ifeq ($(CONFIG_AMDM37X_UART),y)118 GENARCH_SOURCES += \119 genarch/src/drivers/amdm37x/uart.c120 115 endif 121 116 -
kernel/genarch/include/genarch/drivers/am335x/uart.h
r716357f reef14771 37 37 #define _KERN_AM335X_UART_H_ 38 38 39 #include "uart_regs.h"39 #include <genarch/drivers/omap/uart.h> 40 40 41 41 #define AM335x_UART0_BASE_ADDRESS 0x44E09000 … … 63 63 #define AM335x_UART5_IRQ 46 64 64 65 typedef struct {66 am335x_uart_regs_t *regs;67 indev_t *indev;68 outdev_t outdev;69 irq_t irq;70 } am335x_uart_t;71 72 #ifdef CONFIG_AM335X_UART73 extern bool am335x_uart_init(am335x_uart_t *uart, inr_t interrupt,74 uintptr_t addr, size_t size);75 76 extern void am335x_uart_input_wire(am335x_uart_t *uart, indev_t *indev);77 #else78 static bool am335x_uart_init(am335x_uart_t *uart, inr_t interrupt,79 uintptr_t addr, size_t size)80 { return true; }81 82 static void am335x_uart_input_wire(am335x_uart_t *uart, indev_t *indev) {}83 #endif84 85 65 #endif 86 66 -
kernel/genarch/include/genarch/drivers/amdm37x/uart.h
r716357f reef14771 37 37 #define _AMDM37x_UART_H_ 38 38 39 #include "uart_regs.h"39 #include <genarch/drivers/omap/uart.h> 40 40 41 41 /* AMDM37x TRM p. 2950 */ … … 56 56 #define AMDM37x_UART4_IRQ 80 /* AMDM37x TRM p. 2418 */ 57 57 58 typedef struct {59 amdm37x_uart_regs_t *regs;60 indev_t *indev;61 outdev_t outdev;62 irq_t irq;63 } amdm37x_uart_t;64 65 66 bool amdm37x_uart_init(amdm37x_uart_t *, inr_t, uintptr_t, size_t);67 void amdm37x_uart_input_wire(amdm37x_uart_t *, indev_t *);68 69 58 #endif 70 59 -
kernel/genarch/src/drivers/omap/uart.c
r716357f reef14771 32 32 /** 33 33 * @file 34 * @brief Texas Instruments AM335xon-chip uart serial line driver.34 * @brief Texas Instruments OMAP on-chip uart serial line driver. 35 35 */ 36 36 37 #include <genarch/drivers/ am335x/uart.h>37 #include <genarch/drivers/omap/uart.h> 38 38 #include <ddi/device.h> 39 39 #include <str.h> 40 40 #include <mm/km.h> 41 41 42 static void am335x_uart_txb(am335x_uart_t *uart, uint8_t b)42 static void omap_uart_txb(omap_uart_t *uart, uint8_t b) 43 43 { 44 44 /* Wait for buffer */ 45 while (uart->regs->ssr & AM335x_UART_SSR_TX_FIFO_FULL_FLAG);45 while (uart->regs->ssr & OMAP_UART_SSR_TX_FIFO_FULL_FLAG); 46 46 /* Write to the outgoing fifo */ 47 47 uart->regs->thr = b; 48 48 } 49 49 50 static void am335x_uart_putchar(outdev_t *dev, wchar_t ch)50 static void omap_uart_putchar(outdev_t *dev, wchar_t ch) 51 51 { 52 am335x_uart_t *uart = dev->data;52 omap_uart_t *uart = dev->data; 53 53 if (!ascii_check(ch)) { 54 am335x_uart_txb(uart, U_SPECIAL);54 omap_uart_txb(uart, U_SPECIAL); 55 55 } else { 56 56 if (ch == '\n') 57 am335x_uart_txb(uart, '\r');58 am335x_uart_txb(uart, ch);57 omap_uart_txb(uart, '\r'); 58 omap_uart_txb(uart, ch); 59 59 } 60 60 } 61 61 62 static outdev_operations_t am335x_uart_ops = {62 static outdev_operations_t omap_uart_ops = { 63 63 .redraw = NULL, 64 .write = am335x_uart_putchar,64 .write = omap_uart_putchar, 65 65 }; 66 66 67 static irq_ownership_t am335x_uart_claim(irq_t *irq)67 static irq_ownership_t omap_uart_claim(irq_t *irq) 68 68 { 69 69 return IRQ_ACCEPT; 70 70 } 71 71 72 static void am335x_uart_handler(irq_t *irq)72 static void omap_uart_handler(irq_t *irq) 73 73 { 74 am335x_uart_t *uart = irq->instance;74 omap_uart_t *uart = irq->instance; 75 75 while ((uart->regs->rx_fifo_lvl)) { 76 76 const uint8_t val = uart->regs->rhr; … … 81 81 } 82 82 83 bool am335x_uart_init(84 am335x_uart_t *uart, inr_t interrupt, uintptr_t addr, size_t size)83 bool omap_uart_init( 84 omap_uart_t *uart, inr_t interrupt, uintptr_t addr, size_t size) 85 85 { 86 86 ASSERT(uart); … … 90 90 91 91 /* Soft reset the port */ 92 uart->regs->sysc = AM335x_UART_SYSC_SOFTRESET_FLAG;93 while (!(uart->regs->syss & AM335x_UART_SYSS_RESETDONE_FLAG));92 uart->regs->sysc = OMAP_UART_SYSC_SOFTRESET_FLAG; 93 while (!(uart->regs->syss & OMAP_UART_SYSS_RESETDONE_FLAG)); 94 94 95 95 /* Disable the UART module */ 96 uart->regs->mdr1 |= AM335x_UART_MDR_MS_DISABLE;96 uart->regs->mdr1 |= OMAP_UART_MDR_MS_DISABLE; 97 97 98 98 /* Enable access to EFR register */ … … 100 100 101 101 /* Enable access to TCL_TLR register */ 102 const bool enhanced = uart->regs->efr & AM335x_UART_EFR_ENH_FLAG;103 uart->regs->efr |= AM335x_UART_EFR_ENH_FLAG; /* Turn on enh. */102 const bool enhanced = uart->regs->efr & OMAP_UART_EFR_ENH_FLAG; 103 uart->regs->efr |= OMAP_UART_EFR_ENH_FLAG; /* Turn on enh. */ 104 104 uart->regs->lcr = 0x80; /* Config mode A */ 105 105 106 106 /* Set default (val 0) triggers, disable DMA enable FIFOs */ 107 const bool tcl_tlr = uart->regs->mcr & AM335x_UART_MCR_TCR_TLR_FLAG;107 const bool tcl_tlr = uart->regs->mcr & OMAP_UART_MCR_TCR_TLR_FLAG; 108 108 /* Enable access to tcr and tlr registers */ 109 uart->regs->mcr |= AM335x_UART_MCR_TCR_TLR_FLAG;109 uart->regs->mcr |= OMAP_UART_MCR_TCR_TLR_FLAG; 110 110 111 111 /* Enable FIFOs */ 112 uart->regs->fcr = AM335x_UART_FCR_FIFO_EN_FLAG;112 uart->regs->fcr = OMAP_UART_FCR_FIFO_EN_FLAG; 113 113 114 114 /* Enable fine granularity for RX FIFO and set trigger level to 1, 115 115 * TX FIFO, trigger level is irrelevant*/ 116 116 uart->regs->lcr = 0xBF; /* Sets config mode B */ 117 uart->regs->scr = AM335x_UART_SCR_RX_TRIG_GRANU1_FLAG;118 uart->regs->tlr = 1 << AM335x_UART_TLR_RX_FIFO_TRIG_SHIFT;117 uart->regs->scr = OMAP_UART_SCR_RX_TRIG_GRANU1_FLAG; 118 uart->regs->tlr = 1 << OMAP_UART_TLR_RX_FIFO_TRIG_SHIFT; 119 119 120 120 /* Sets config mode A */ … … 122 122 /* Restore tcl_tlr access flag */ 123 123 if (!tcl_tlr) 124 uart->regs->mcr &= ~ AM335x_UART_MCR_TCR_TLR_FLAG;124 uart->regs->mcr &= ~OMAP_UART_MCR_TCR_TLR_FLAG; 125 125 /* Sets config mode B */ 126 126 uart->regs->lcr = 0xBF; … … 132 132 /* Restore enhanced */ 133 133 if (!enhanced) 134 uart->regs->efr &= ~ AM335x_UART_EFR_ENH_FLAG;134 uart->regs->efr &= ~OMAP_UART_EFR_ENH_FLAG; 135 135 136 136 /* Set the DIV_EN bit to 0 */ 137 uart->regs->lcr &= ~ AM335x_UART_LCR_DIV_EN_FLAG;137 uart->regs->lcr &= ~OMAP_UART_LCR_DIV_EN_FLAG; 138 138 /* Set the BREAK_EN bit to 0 */ 139 uart->regs->lcr &= ~ AM335x_UART_LCR_BREAK_EN_FLAG;139 uart->regs->lcr &= ~OMAP_UART_LCR_BREAK_EN_FLAG; 140 140 /* No parity */ 141 uart->regs->lcr &= ~ AM335x_UART_LCR_PARITY_EN_FLAG;141 uart->regs->lcr &= ~OMAP_UART_LCR_PARITY_EN_FLAG; 142 142 /* Stop = 1 bit */ 143 uart->regs->lcr &= ~ AM335x_UART_LCR_NB_STOP_FLAG;143 uart->regs->lcr &= ~OMAP_UART_LCR_NB_STOP_FLAG; 144 144 /* Char length = 8 bits */ 145 uart->regs->lcr |= AM335x_UART_LCR_CHAR_LENGTH_8BITS;145 uart->regs->lcr |= OMAP_UART_LCR_CHAR_LENGTH_8BITS; 146 146 147 147 /* Enable the UART module */ 148 uart->regs->mdr1 &= ( AM335x_UART_MDR_MS_UART16 &149 ~ AM335x_UART_MDR_MS_MASK);148 uart->regs->mdr1 &= (OMAP_UART_MDR_MS_UART16 & 149 ~OMAP_UART_MDR_MS_MASK); 150 150 151 151 /* Disable interrupts */ … … 153 153 154 154 /* Setup outdev */ 155 outdev_initialize(" am335x_uart_dev", &uart->outdev, &am335x_uart_ops);155 outdev_initialize("omap_uart_dev", &uart->outdev, &omap_uart_ops); 156 156 uart->outdev.data = uart; 157 157 … … 160 160 uart->irq.devno = device_assign_devno(); 161 161 uart->irq.inr = interrupt; 162 uart->irq.claim = am335x_uart_claim;163 uart->irq.handler = am335x_uart_handler;162 uart->irq.claim = omap_uart_claim; 163 uart->irq.handler = omap_uart_handler; 164 164 uart->irq.instance = uart; 165 165 … … 167 167 } 168 168 169 void am335x_uart_input_wire(am335x_uart_t *uart, indev_t *indev)169 void omap_uart_input_wire(omap_uart_t *uart, indev_t *indev) 170 170 { 171 171 ASSERT(uart); … … 175 175 irq_register(&uart->irq); 176 176 /* Enable interrupt on receive */ 177 uart->regs->ier |= AM335x_UART_IER_RHR_IRQ_FLAG;177 uart->regs->ier |= OMAP_UART_IER_RHR_IRQ_FLAG; 178 178 } 179 179
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