Changes in / [c867a216:f16a76b] in mainline
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- 2 edited
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boot/arch/mips32/src/asm.S
rc867a216 rf16a76b 41 41 42 42 start: 43 /* Setup CPU map (on msim this code 44 is executed in parallel on all CPUs, 45 but it not an issue) */ 43 /* 44 * Setup the CP0 configuration 45 * - Disable 64-bit kernel addressing mode 46 * - DIsable 64-bit supervisor adressing mode 47 * - Disable 64-bit user addressing mode 48 */ 49 mfc0 $a0, $status 50 la $a1, 0xffffff1f 51 and $a0, $a1, $a0 52 mtc0 $a0, $status 53 54 /* 55 * Setup CPU map (on msim this code 56 * is executed in parallel on all CPUs, 57 * but it not an issue). 58 */ 46 59 la $a0, PA2KA(CPUMAP_OFFSET) 47 60 … … 94 107 lw $k1, ($k0) 95 108 96 /* If we are not running on BSP 97 then end in an infinite loop */ 109 /* 110 * If we are not running on BSP 111 * then end in an infinite loop. 112 */ 98 113 beq $k1, $zero, bsp 99 114 nop … … 127 142 128 143 jump_to_kernel: 129 # 130 # TODO: 131 # Make sure that the I-cache, D-cache and memory are mutually coherent 132 # before passing control to the copied code. 133 # 144 /* 145 * TODO: 146 * 147 * Make sure that the I-cache, D-cache and memory are mutually 148 * coherent before passing control to the copied code. 149 */ 134 150 j $a0 135 151 nop -
uspace/app/bdsh/cmds/modules/mkfile/mkfile.c
rc867a216 rf16a76b 125 125 126 126 for (c = 0, optind = 0, opt_ind = 0; c != -1;) { 127 c = getopt_long(argc, argv, " pvhVfm:", long_options, &opt_ind);127 c = getopt_long(argc, argv, "s:h", long_options, &opt_ind); 128 128 switch (c) { 129 129 case 'h':
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