Changeset f2cb80a in mainline for kernel/arch/amd64/include/arch/mm/pat.h

Timestamp:

2024-02-23T17:57:23Z (11 months ago)

Author:

GitHub <noreply@…>

Children:

192019f

Parents:

86f862c (diff), 90ba06c (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

git-author:

boba-buba <120932204+boba-buba@…> (2024-02-23 17:57:23)

git-committer:

GitHub <noreply@…> (2024-02-23 17:57:23)

Message:

Merge branch 'HelenOS:master' into topic/packet-capture

File:

• kernel/arch/amd64/include/arch/mm/pat.h (moved) (moved from uspace/lib/c/arch/amd64/include/libarch/stackarg.h ) (3 diffs)

kernel/arch/amd64/include/arch/mm/pat.h

@@ -1 +1 @@
 /*
- * Copyright (c) 2006 Josef Cejka
+ * Copyright (c) 2024 Jiří Zárevúcky
  * All rights reserved.
  *
@@ -27 +27 @@
  */
 
-/** @addtogroup libcamd64
+/** @addtogroup kernel_amd64_mm
  * @{
  */
@@ -33 +33 @@
  */
 
-#ifndef _LIBC_STACKARG_H_
-#define _LIBC_STACKARG_H_
+#ifndef KERN_amd64_MM_PAT_H_
+#define KERN_amd64_MM_PAT_H_
+
+#include <arch/asm.h>
+#include <arch/cpuid.h>
+
+#define MSR_IA32_PAT  0x00000277
+
+typedef enum {
+        PAT_TYPE_UNCACHEABLE = 0,
+        PAT_TYPE_WRITE_COMBINING = 1,
+        PAT_TYPE_WRITE_THROUGH = 4,
+        PAT_TYPE_WRITE_PROTECTED = 5,
+        PAT_TYPE_WRITE_BACK = 6,
+        PAT_TYPE_UNCACHED  = 7,
+} pat_type_t;
+
+/**
+ * Assign caching type for a particular combination of PAT,
+ * PCD and PWT bits in PTE.
+ */
+static inline void pat_set_mapping(bool pat, bool pcd, bool pwt,
+    pat_type_t type)
+{
+        int index = pat << 2 | pcd << 1 | pwt;
+        int shift = index * 8;
+
+        uint64_t r = read_msr(MSR_IA32_PAT);
+        r &= ~(0xffull << shift);
+        r |= ((uint64_t) type) << shift;
+        write_msr(MSR_IA32_PAT, r);
+}
+
+static inline bool pat_supported(void)
+{
+        if (!has_cpuid())
+                return false;
+
+        cpu_info_t info;
+        cpuid(INTEL_CPUID_STANDARD, &info);
+
+        return (info.cpuid_edx & (1 << 16)) != 0;
+}
 
 #endif