Changeset f3a6c8e5 in mainline


Ignore:
Timestamp:
2005-09-10T01:16:19Z (19 years ago)
Author:
Ondrej Palkovsky <ondrap@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
9060bd1
Parents:
ffc277e
Message:

Doc updates, small fixes.

Files:
3 edited

Legend:

Unmodified
Added
Removed
  • arch/mips/src/exception.c

    rffc277e rf3a6c8e5  
    5252        cp0_status_write(cp0_status_read() & ~ (cp0_status_exl_exception_bit |
    5353                                                cp0_status_um_bit));
     54
    5455        /* Save pstate so that the threads can access it */
    55         if (THREAD)
     56        /* If THREAD->pstate is set, this is nested exception,
     57         * do not rewrite it
     58         */
     59        if (THREAD && !THREAD->pstate)
    5660                THREAD->pstate = pstate;
    5761
     
    6468                case EXC_TLBS:
    6569                        tlb_invalid(pstate);
     70                        break;
     71                case EXC_CpU:
     72#ifdef FPU_LAZY     
     73                        scheduler_fpu_lazy_request();
     74#else
     75                        panic("unhandled Coprocessor Unusable Exception\n");
     76#endif
    6677                        break;
    6778                case EXC_Mod:
     
    8899                        panic("unhandled Reserved Instruction Exception\n");
    89100                        break;
    90                 case EXC_CpU:
    91 #ifdef FPU_LAZY     
    92                         scheduler_fpu_lazy_request();
    93 #else
    94                         panic("unhandled Coprocessor Unusable Exception\n");
    95 #endif
    96                         break;
    97101                case EXC_Ov:
    98102                        panic("unhandled Arithmetic Overflow Exception\n");
     
    118122       
    119123        pstate->epc += epc_shift;
    120         /* Probable not needed, but just for sure that nobody
    121          * will continue accessing it */
     124        /* Set to NULL, so that we can still support nested
     125         * exceptions
     126         * TODO: We should probably set EXL bit before this command,
     127         * nesting. On the other hand, if some exception occurs between
     128         * here and ERET, it won't set anything on the pstate anyway.
     129         */
    122130        if (THREAD)
    123131                THREAD->pstate = NULL;
  • doc/requirements

    rffc277e rf3a6c8e5  
    2121        o VMware Workstation 4, VMware Workstation 5
    2222
     23amd64 port
     24=========
     25        HARDWARE REQUIREMENTS
     26        o no real hardware supported
    2327
    24 mips port
     28        SMP COMPATIBILITY
     29        o Bochs 2.2
     30                o 2x-8x AMD64 CPU
     31        o Simics Simics 2.2.19
     32                o 2x-8x AMD hammer CPU
     33
     34        EMULATORS AND VIRTUALIZERS
     35        o Bochs 2.2
     36        o Simics Simics 2.2.19
     37
     38mips32 port
    2539=========
    2640
     
    3448
    3549        EMULATORS AND VIRTUALIZERS
    36         o msim
     50        o msim 1.2.6 with lwl/lwr/swl/swr patch
     51        o gxemul - both big and little endian
     52        o simics
    3753
    3854ia64 port
  • src/Makefile.config

    rffc277e rf3a6c8e5  
    3535#TEST_DIR=fpu/fpu1
    3636#TEST_DIR=fpu/sse1
     37#TEST_DIR=fpu/mips1
    3738#TEST_DIR=print/print1
    3839#TEST_DIR=thread/thread1
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