Changeset f47fd19 in mainline for kernel/arch/sparc64/include/trap/mmu.h
- Timestamp:
- 2006-08-21T13:36:34Z (18 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- a796127
- Parents:
- ee289cf0
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/include/trap/mmu.h
ree289cf0 rf47fd19 39 39 40 40 #include <arch/stack.h> 41 #include <arch/mm/tlb.h> 42 #include <arch/mm/mmu.h> 43 #include <arch/mm/tte.h> 41 44 42 45 #define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64 … … 56 59 57 60 .macro FAST_DATA_ACCESS_MMU_MISS_HANDLER 58 save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp 59 call fast_data_access_mmu_miss 60 nop 61 restore 61 /* 62 * First, test if it is the portion of the kernel address space 63 * which is faulting. If that is the case, immediately create 64 * identity mapping for that page in DTLB. VPN 0 is excluded from 65 * this treatment. 66 * 67 * Note that branch-delay slots are used in order to save space. 68 */ 69 mov VA_DMMU_TAG_ACCESS, %g1 70 ldxa [%g1] ASI_DMMU, %g1 ! read the faulting Context and VPN 71 set TLB_TAG_ACCESS_CONTEXT_MASK, %g2 72 andcc %g1, %g2, %g3 ! get Context 73 bnz 0f ! Context is non-zero 74 andncc %g1, %g2, %g3 ! get page address into %g3 75 bz 0f ! page address is zero 76 77 /* 78 * Create and insert the identity-mapped entry for 79 * the faulting kernel page. 80 */ 81 82 or %g3, (TTE_CP|TTE_P|TTE_W), %g2 ! 8K pages are the default (encoded as 0) 83 set 1, %g3 84 sllx %g3, TTE_V_SHIFT, %g3 85 or %g2, %g3, %g2 86 stxa %g2, [%g0] ASI_DTLB_DATA_IN_REG ! identity map the kernel page 62 87 retry 88 89 0: 90 save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp 91 PREEMPTIBLE_HANDLER fast_data_access_mmu_miss 63 92 .endm 64 93
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