Changeset f4c2b6a in mainline for kernel/arch/ia32/include/smp/apic.h

Timestamp:

2008-06-03T14:59:48Z (17 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

2c4fb51

Parents:

b63f8569

Message:

reflect changes in generic code
proper formatting directives
coding style

File:

• kernel/arch/ia32/include/smp/apic.h (modified) (12 diffs)

kernel/arch/ia32/include/smp/apic.h

@@ -106 +106 @@
 
 /** Interrupt Command Register. */
-#define ICRlo           (0x300/sizeof(uint32_t))
-#define ICRhi           (0x310/sizeof(uint32_t))
+#define ICRlo           (0x300 / sizeof(uint32_t))
+#define ICRhi           (0x310 / sizeof(uint32_t))
 typedef struct {
         union {
@@ -134 +134 @@
 
 /* End Of Interrupt. */
-#define EOI             (0x0b0/sizeof(uint32_t))
+#define EOI             (0x0b0 / sizeof(uint32_t))
 
 /** Error Status Register. */
-#define ESR             (0x280/sizeof(uint32_t))
+#define ESR             (0x280 / sizeof(uint32_t))
 typedef union {
         uint32_t value;
@@ -155 +155 @@
 
 /* Task Priority Register */
-#define TPR             (0x080/sizeof(uint32_t))
+#define TPR             (0x080 / sizeof(uint32_t))
 typedef union {
         uint32_t value;
@@ -165 +165 @@
 
 /** Spurious-Interrupt Vector Register. */
-#define SVR             (0x0f0/sizeof(uint32_t))
+#define SVR             (0x0f0 / sizeof(uint32_t))
 typedef union {
         uint32_t value;
@@ -177 +177 @@
 
 /** Time Divide Configuration Register. */
-#define TDCR            (0x3e0/sizeof(uint32_t))
+#define TDCR            (0x3e0 / sizeof(uint32_t))
 typedef union {
         uint32_t value;
@@ -187 +187 @@
 
 /* Initial Count Register for Timer */
-#define ICRT            (0x380/sizeof(uint32_t))
+#define ICRT            (0x380 / sizeof(uint32_t))
 
 /* Current Count Register for Timer */
-#define CCRT            (0x390/sizeof(uint32_t))
+#define CCRT            (0x390 / sizeof(uint32_t))
 
 /** LVT Timer register. */
-#define LVT_Tm          (0x320/sizeof(uint32_t))
+#define LVT_Tm          (0x320 / sizeof(uint32_t))
 typedef union {
         uint32_t value;
@@ -208 +208 @@
 
 /** LVT LINT registers. */
-#define LVT_LINT0       (0x350/sizeof(uint32_t))
-#define LVT_LINT1       (0x360/sizeof(uint32_t))
+#define LVT_LINT0       (0x350 / sizeof(uint32_t))
+#define LVT_LINT1       (0x360 / sizeof(uint32_t))
 typedef union {
         uint32_t value;
@@ -226 +226 @@
 
 /** LVT Error register. */
-#define LVT_Err         (0x370/sizeof(uint32_t))
+#define LVT_Err         (0x370 / sizeof(uint32_t))
 typedef union {
         uint32_t value;
@@ -240 +240 @@
 
 /** Local APIC ID Register. */
-#define L_APIC_ID       (0x020/sizeof(uint32_t))
+#define L_APIC_ID       (0x020 / sizeof(uint32_t))
 typedef union {
         uint32_t value;
@@ -250 +250 @@
 
 /** Local APIC Version Register */
-#define LAVR            (0x030/sizeof(uint32_t))
+#define LAVR            (0x030 / sizeof(uint32_t))
 #define LAVR_Mask       0xff
-#define is_local_apic(x)        (((x)&LAVR_Mask&0xf0)==0x1)
-#define is_82489DX_apic(x)      ((((x)&LAVR_Mask&0xf0)==0x0))
-#define is_local_xapic(x)       (((x)&LAVR_Mask)==0x14)
+#define is_local_apic(x)        (((x) & LAVR_Mask & 0xf0) == 0x1)
+#define is_82489DX_apic(x)      ((((x) & LAVR_Mask & 0xf0) == 0x0))
+#define is_local_xapic(x)       (((x) & LAVR_Mask) == 0x14)
 
 /** Logical Destination Register. */
-#define  LDR            (0x0d0/sizeof(uint32_t))
+#define  LDR            (0x0d0 / sizeof(uint32_t))
 typedef union {
         uint32_t value;
@@ -267 +267 @@
 
 /** Destination Format Register. */
-#define DFR             (0x0e0/sizeof(uint32_t))
+#define DFR             (0x0e0 / sizeof(uint32_t))
 typedef union {
         uint32_t value;
@@ -277 +277 @@
 
 /* IO APIC */
-#define IOREGSEL        (0x00/sizeof(uint32_t))
-#define IOWIN           (0x10/sizeof(uint32_t))
+#define IOREGSEL        (0x00 / sizeof(uint32_t))
+#define IOWIN           (0x10 / sizeof(uint32_t))
 
 #define IOAPICID        0x00