Changeset f5acb62 in mainline
- Timestamp:
- 2005-12-10T18:23:00Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 02055415
- Parents:
- 3887b105
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/mips32/src/exception.c
r3887b105 rf5acb62 104 104 } 105 105 106 static void cpuns bl_exception(int n, void *data)106 static void cpuns_exception(int n, void *data) 107 107 { 108 108 if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id) … … 180 180 exc_register(EXC_Int, "interrupt", interrupt_exception); 181 181 #ifdef CONFIG_FPU_LAZY 182 exc_register(EXC_CpU, "cpunus", cpun _exception);182 exc_register(EXC_CpU, "cpunus", cpuns_exception); 183 183 #endif 184 184 }
Note:
See TracChangeset
for help on using the changeset viewer.