Changeset f9a56c0 in mainline for kernel/arch/sparc64/src/trap/interrupt.c
- Timestamp:
- 2006-08-17T11:39:38Z (18 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- ee289cf0
- Parents:
- ec2c55a
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/src/trap/interrupt.c
rec2c55a rf9a56c0 34 34 35 35 #include <arch/interrupt.h> 36 #include <arch/trap/interrupt.h> 36 37 #include <interrupt.h> 38 #include <arch/drivers/fhc.h> 37 39 #include <arch/types.h> 38 40 #include <debug.h> 39 41 #include <ipc/sysipc.h> 42 #include <arch/asm.h> 43 #include <arch/barrier.h> 44 45 #include <genarch/kbd/z8530.h> 40 46 41 47 /** Register Interrupt Level Handler. … … 59 65 } 60 66 67 void interrupt(void) 68 { 69 uint64_t intrcv; 70 uint64_t data0; 71 72 intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0); 73 data0 = asi_u64_read(ASI_UDB_INTR_R, ASI_UDB_INTR_R_DATA_0); 74 75 switch (data0) { 76 #ifdef CONFIG_Z8530 77 case Z8530_INTRCV_DATA0: 78 /* 79 * So far, we know we got this interrupt through the FHC. 80 * Since we don't have enough information about the FHC and 81 * because the interrupt looks like level sensitive, 82 * we cannot handle it by scheduling one of the level 83 * interrupt traps. Call the interrupt handler directly. 84 */ 85 fhc_uart_reset(); 86 z8530_interrupt(); 87 break; 88 #endif 89 } 90 91 membar(); 92 asi_u64_write(ASI_INTR_RECEIVE, 0, 0); 93 } 94 61 95 /** @} 62 96 */ 63
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