Changes in / [119b46e:fa33ac4] in mainline
- Files:
-
- 6 added
- 8 deleted
- 31 edited
-
HelenOS.config (modified) (9 diffs)
-
boot/arch/mips32/Makefile.inc (modified) (1 diff)
-
boot/arch/mips32/_link.ld.in (modified) (1 diff)
-
boot/arch/mips32/include/arch.h (modified) (2 diffs)
-
boot/arch/mips32/include/types.h (modified) (1 diff)
-
boot/arch/mips32/src/asm.S (modified) (1 diff)
-
boot/arch/mips32/src/main.c (modified) (3 diffs)
-
boot/arch/mips32/src/putchar.c (modified) (1 diff)
-
contrib/conf/mips32-gx.sh (added)
-
defaults/mips32/GXemul/Makefile.config (added)
-
defaults/mips32/malta-be/Makefile.config (deleted)
-
defaults/mips32/malta-le/Makefile.config (deleted)
-
kernel/arch/mips32/Makefile.inc (modified) (3 diffs)
-
kernel/arch/mips32/_link.ld.in (modified) (1 diff)
-
kernel/arch/mips32/include/arch/arch.h (modified) (2 diffs)
-
kernel/arch/mips32/include/arch/cp0.h (modified) (1 diff)
-
kernel/arch/mips32/include/arch/mach/malta/malta.h (deleted)
-
kernel/arch/mips32/include/arch/mach/msim/msim.h (deleted)
-
kernel/arch/mips32/include/arch/machine_func.h (deleted)
-
kernel/arch/mips32/include/arch/mm/tlb.h (modified) (2 diffs)
-
kernel/arch/mips32/src/exception.c (modified) (1 diff)
-
kernel/arch/mips32/src/interrupt.c (modified) (5 diffs)
-
kernel/arch/mips32/src/mach/malta/malta.c (deleted)
-
kernel/arch/mips32/src/mach/msim/msim.c (deleted)
-
kernel/arch/mips32/src/machine_func.c (deleted)
-
kernel/arch/mips32/src/mips32.c (modified) (5 diffs)
-
kernel/arch/mips32/src/mm/frame.c (modified) (4 diffs)
-
kernel/arch/mips32/src/mm/tlb.c (modified) (19 diffs)
-
kernel/arch/mips64/src/mips64.c (modified) (3 diffs)
-
kernel/arch/mips64/src/mm/frame.c (modified) (1 diff)
-
kernel/generic/include/mm/tlb.h (modified) (1 diff)
-
release/Makefile (modified) (1 diff)
-
tools/autotool.py (modified) (1 diff)
-
uspace/Makefile (modified) (1 diff)
-
uspace/app/init/init.c (modified) (1 diff)
-
uspace/lib/c/arch/mips32/Makefile.common (modified) (2 diffs)
-
uspace/lib/c/arch/mips32eb/Makefile.common (modified) (2 diffs)
-
uspace/srv/bd/gxe_bd/Makefile (added)
-
uspace/srv/bd/gxe_bd/gxe_bd.c (added)
-
uspace/srv/hid/input/Makefile (modified) (2 diffs)
-
uspace/srv/hid/input/ctl/gxe_fb.c (added)
-
uspace/srv/hid/input/input.c (modified) (1 diff)
-
uspace/srv/hid/input/kbd_ctl.h (modified) (1 diff)
-
uspace/srv/hid/input/kbd_port.h (modified) (1 diff)
-
uspace/srv/hid/input/port/gxemul.c (added)
Legend:
- Unmodified
- Added
- Removed
-
HelenOS.config
r119b46e rfa33ac4 44 44 % Machine type 45 45 @ "msim" MSIM 46 @ "b malta" MIPS Malta Development Boardbig endian47 @ "l malta" MIPS Malta Development Boardlittle endian46 @ "bgxemul" GXEmul big endian 47 @ "lgxemul" GXEmul little endian 48 48 ! [PLATFORM=mips32] MACHINE (choice) 49 49 … … 115 115 ! [PLATFORM=arm32&(PROCESSOR=cortex_a8)] PROCESSOR_ARCH (choice) 116 116 117 % CPU type118 @ "R4000" MIPS R4000119 ! [PLATFORM=mips32&MACHINE=msim] PROCESSOR (choice)120 121 % CPU type122 @ "4Kc" MIPS 4Kc123 ! [PLATFORM=mips32&(MACHINE=bmalta|MACHINE=lmalta)] PROCESSOR (choice)124 125 117 % RAM disk format 126 118 @ "tmpfs" TMPFS image … … 201 193 % User space architecture 202 194 @ "mips32" 203 ! [PLATFORM=mips32&(MACHINE=msim|MACHINE=l malta)] UARCH (choice)195 ! [PLATFORM=mips32&(MACHINE=msim|MACHINE=lgxemul)] UARCH (choice) 204 196 205 197 % User space architecture 206 198 @ "mips32eb" 207 ! [PLATFORM=mips32&MACHINE=b malta] UARCH (choice)199 ! [PLATFORM=mips32&MACHINE=bgxemul] UARCH (choice) 208 200 209 201 % User space architecture … … 278 270 279 271 % Image format 280 @ "e lf"281 ! [PLATFORM=mips32&(MACHINE=b malta|MACHINE=lmalta)] IMAGE (choice)272 @ "ecoff" 273 ! [PLATFORM=mips32&(MACHINE=bgxemul|MACHINE=lgxemul)] IMAGE (choice) 282 274 283 275 % Image format … … 368 360 ! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=ia64|PLATFORM=sparc64] CONFIG_FPU (y) 369 361 362 % FPU support 363 ! [PLATFORM=mips32&(MACHINE=lgxemul|MACHINE=bgxemul)] CONFIG_FPU (y) 364 370 365 ## armv7 made fpu hardware compulsory 371 366 % FPU support … … 452 447 @ "generic" Monitor or serial line 453 448 @ "none" No output device 454 ! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=sparc64|PLATFORM=ppc32|(PLATFORM=ia64&MACHINE=i460GX)|(PLATFORM=mips32&(MACHINE=msim|MACHINE=bmalta|MACHINE=lmalta))|(PLATFORM=mips64&MACHINE=msim)] CONFIG_HID_OUT (choice) 449 ! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=sparc64|PLATFORM=ppc32|(PLATFORM=ia64&MACHINE=i460GX)|(PLATFORM=mips32&MACHINE=msim)|(PLATFORM=mips64&MACHINE=msim)] CONFIG_HID_OUT (choice) 450 451 % Output device class 452 @ "generic" Monitor or serial line 453 @ "monitor" Monitor 454 @ "serial" Serial line 455 @ "none" No output device 456 ! [PLATFORM=mips32&(MACHINE=bgxemul|MACHINE=lgxemul)] CONFIG_HID_OUT (choice) 455 457 456 458 % PC keyboard support … … 463 465 ! [(CONFIG_HID_IN=generic|CONFIG_HID_IN=keyboard)&PLATFORM=arm32&MACHINE=integratorcp] CONFIG_PC_KBD (y/n) 464 466 465 % Support for msim keyboard466 ! [CONFIG_HID_IN=generic& MACHINE=msim] CONFIG_MSIM_KBD (y/n)467 468 % Support for msim printer469 ! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)& MACHINE=msim] CONFIG_MSIM_PRN (y/n)467 % Support for msim/GXemul keyboard 468 ! [CONFIG_HID_IN=generic&(PLATFORM=mips32|PLATFORM=mips64)] CONFIG_MIPS_KBD (y/n) 469 470 % Support for msim/GXemul printer 471 ! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&(PLATFORM=mips32|PLATFORM=mips64)] CONFIG_MIPS_PRN (y/n) 470 472 471 473 % Support for VIA CUDA controller … … 509 511 510 512 % Dummy serial line input 511 ! [CONFIG_M SIM_KBD=y|CONFIG_ARM_KBD=y] CONFIG_DSRLNIN (y)513 ! [CONFIG_MIPS_KBD=y|CONFIG_ARM_KBD=y] CONFIG_DSRLNIN (y) 512 514 513 515 % Dummy serial line output 514 ! [CONFIG_M SIM_PRN=y|CONFIG_ARM_PRN=y] CONFIG_DSRLNOUT (y)516 ! [CONFIG_MIPS_PRN=y|CONFIG_ARM_PRN=y] CONFIG_DSRLNOUT (y) 515 517 516 518 % Serial line input module … … 525 527 % Framebuffer support 526 528 ! [CONFIG_HID_OUT=generic&(PLATFORM=ia32|PLATFORM=amd64|PLATFORM=ppc32)] CONFIG_FB (y/n) 529 530 % Framebuffer support 531 ! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=monitor)&PLATFORM=mips32&(MACHINE=lgxemul|MACHINE=bgxemul)] CONFIG_FB (y/n) 527 532 528 533 % Framebuffer support -
boot/arch/mips32/Makefile.inc
r119b46e rfa33ac4 29 29 BFD_ARCH = mips 30 30 BITS = 32 31 EXTRA_CFLAGS = -msoft-float -mno-abicalls -G 0 -fno-zero-initialized-in-bss -m abi=3231 EXTRA_CFLAGS = -msoft-float -mno-abicalls -G 0 -fno-zero-initialized-in-bss -mips3 -mabi=32 32 32 33 RD_SRVS_NON_ESSENTIAL += \ 34 $(USPACE_PATH)/srv/bd/gxe_bd/gxe_bd 35 36 ifeq ($(MACHINE),lgxemul) 37 BFD_NAME = elf32-tradlittlemips 38 BFD_OUTPUT = ecoff-littlemips 39 ENDIANESS = LE 40 endif 41 ifeq ($(MACHINE),bgxemul) 42 BFD_NAME = elf32-tradbigmips 43 BFD_OUTPUT = ecoff-bigmips 44 ENDIANESS = BE 45 endif 33 46 ifeq ($(MACHINE),msim) 34 47 BFD_NAME = elf32-tradlittlemips 35 48 BFD_OUTPUT = binary 36 49 ENDIANESS = LE 37 EXTRA_CFLAGS += -march=r400038 50 endif 39 ifeq ($(MACHINE),lmalta)40 BFD_NAME = elf32-tradlittlemips41 BFD_OUTPUT = elf32-tradlittlemips42 ENDIANESS = LE43 EXTRA_CFLAGS += -march=4kc44 endif45 ifeq ($(MACHINE),bmalta)46 BFD_NAME = elf32-tradbigmips47 BFD_OUTPUT = elf32-tradbigmips48 ENDIANESS = BE49 EXTRA_CFLAGS += -march=4kc50 endif51 52 51 53 52 SOURCES = \ -
boot/arch/mips32/_link.ld.in
r119b46e rfa33ac4 2 2 3 3 SECTIONS { 4 #if defined(MACHINE_msim)5 4 . = 0xbfc00000; 6 #elif defined(MACHINE_lmalta) || defined(MACHINE_bmalta)7 . = 0x80103000;8 #endif9 5 .text : { 10 6 *(BOOTSTRAP); -
boot/arch/mips32/include/arch.h
r119b46e rfa33ac4 33 33 #define PAGE_SIZE (1 << PAGE_WIDTH) 34 34 35 #if defined(MACHINE_msim)36 35 #define CPUMAP_OFFSET 0x00001000 37 36 #define STACK_OFFSET 0x00002000 … … 42 41 #define MSIM_VIDEORAM_ADDRESS 0xb0000000 43 42 #define MSIM_DORDER_ADDRESS 0xb0000100 44 #endif45 46 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)47 #define CPUMAP_OFFSET 0x0010000048 #define STACK_OFFSET 0x0010100049 #define BOOTINFO_OFFSET 0x0010200050 #define BOOT_OFFSET 0x0020000051 #define LOADER_OFFSET 0x0010300052 53 #define YAMON_SUBR_BASE PA2KA(0x1fc00500)54 #define YAMON_SUBR_PRINT_COUNT (YAMON_SUBR_BASE + 0x4)55 #endif56 43 57 44 #ifndef __ASM__ 58 45 #define PA2KA(addr) (((uintptr_t) (addr)) + 0x80000000) 59 #define PA2KSEG(addr) (((uintptr_t) (addr)) + 0xa0000000)60 #define KA2PA(addr) (((uintptr_t) (addr)) - 0x80000000)61 46 #define KSEG2PA(addr) (((uintptr_t) (addr)) - 0xa0000000) 62 47 #else -
boot/arch/mips32/include/types.h
r119b46e rfa33ac4 47 47 48 48 typedef struct { 49 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)50 uint32_t sdram_size;51 #endif52 49 uint32_t cpumap; 53 50 size_t cnt; -
boot/arch/mips32/src/asm.S
r119b46e rfa33ac4 51 51 and $a0, $a1, $a0 52 52 mtc0 $a0, $status 53 54 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)55 /*56 * Remember the size of the SDRAM in bootinfo.57 */58 la $a0, PA2KA(BOOTINFO_OFFSET)59 sw $a3, 0($a0)60 #endif61 53 62 54 /* -
boot/arch/mips32/src/main.c
r119b46e rfa33ac4 65 65 for (i = 0; i < COMPONENTS; i++) 66 66 printf(" %p|%p: %s image (%zu/%zu bytes)\n", components[i].start, 67 (uintptr_t) components[i].start >= PA2KSEG(0) ? 68 (void *) KSEG2PA(components[i].start) : 69 (void *) KA2PA(components[i].start), 70 components[i].name, components[i].inflated, 71 components[i].size); 67 (void *) KSEG2PA(components[i].start), components[i].name, 68 components[i].inflated, components[i].size); 72 69 73 70 void *dest[COMPONENTS]; … … 96 93 97 94 for (i = cnt; i > 0; i--) { 98 #ifdef MACHINE_msim99 95 void *tail = dest[i - 1] + components[i].inflated; 100 96 if (tail >= ((void *) PA2KA(LOADER_OFFSET))) { … … 103 99 halt(); 104 100 } 105 #endif106 101 107 102 printf("%s ", components[i - 1].name); -
boot/arch/mips32/src/putchar.c
r119b46e rfa33ac4 32 32 #include <str.h> 33 33 34 #ifdef PUTCHAR_ADDRESS35 #undef PUTCHAR_ADDRESS36 #endif37 38 #if defined(MACHINE_msim)39 #define _putchar(ch) msim_putchar((ch))40 static void msim_putchar(const wchar_t ch)41 {42 *((char *) MSIM_VIDEORAM_ADDRESS) = ch;43 }44 #endif45 46 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)47 #define _putchar(ch) yamon_putchar((ch))48 typedef void (**yamon_print_count_ptr_t)(uint32_t, const char *, uint32_t);49 yamon_print_count_ptr_t yamon_print_count =50 (yamon_print_count_ptr_t) YAMON_SUBR_PRINT_COUNT;51 52 static void yamon_putchar(const wchar_t wch)53 {54 const char ch = (char) wch;55 56 (*yamon_print_count)(0, &ch, 1);57 }58 #endif59 60 34 void putchar(const wchar_t ch) 61 35 { 62 36 if (ascii_check(ch)) 63 _putchar(ch);37 *((char *) MSIM_VIDEORAM_ADDRESS) = ch; 64 38 else 65 _putchar(U_SPECIAL);39 *((char *) MSIM_VIDEORAM_ADDRESS) = U_SPECIAL; 66 40 } 67 -
kernel/arch/mips32/Makefile.inc
r119b46e rfa33ac4 29 29 BFD_ARCH = mips 30 30 BFD = binary 31 GCC_CFLAGS += -msoft-float -mno-abicalls -G 0 -fno-zero-initialized-in-bss -m abi=3231 GCC_CFLAGS += -msoft-float -mno-abicalls -G 0 -fno-zero-initialized-in-bss -mips3 -mabi=32 32 32 33 33 BITS = 32 … … 36 36 # 37 37 38 ifeq ($(MACHINE),lgxemul) 39 BFD_NAME = elf32-tradlittlemips 40 ENDIANESS = LE 41 endif 42 ifeq ($(MACHINE),bgxemul) 43 BFD_NAME = elf32-tradbigmips 44 ENDIANESS = BE 45 GCC_CFLAGS += -D__BE__ 46 endif 38 47 ifeq ($(MACHINE),msim) 39 48 BFD_NAME = elf32-tradlittlemips 40 49 ENDIANESS = LE 41 GCC_CFLAGS += -march=r400042 endif43 ifeq ($(MACHINE),bmalta)44 BFD_NAME = elf32-tradbigmips45 ENDIANESS = BE46 GCC_CFLAGS += -D__BE__ -march=4kc47 endif48 ifeq ($(MACHINE),lmalta)49 BFD_NAME = elf32-tradlittlemips50 ENDIANESS = LE51 GCC_CFLAGS += -march=4kc52 50 endif 53 51 … … 71 69 arch/$(KARCH)/src/fpu_context.c \ 72 70 arch/$(KARCH)/src/ddi/ddi.c \ 73 arch/$(KARCH)/src/smp/smp.c \ 74 arch/$(KARCH)/src/machine_func.c 75 76 ifeq ($(MACHINE),msim) 77 ARCH_SOURCES += \ 78 arch/$(KARCH)/src/smp/dorder.c 79 endif 80 81 ifeq ($(MACHINE),$(filter lmalta bmalta,$(MACHINE))) 82 ARCH_SOURCES += arch/$(KARCH)/src/mach/malta/malta.c 83 endif 84 ifeq ($(MACHINE),msim) 85 ARCH_SOURCES += arch/$(KARCH)/src/mach/msim/msim.c 86 endif 87 71 arch/$(KARCH)/src/smp/dorder.c \ 72 arch/$(KARCH)/src/smp/smp.c -
kernel/arch/mips32/_link.ld.in
r119b46e rfa33ac4 10 10 #define mips mips 11 11 12 #if defined(MACHINE_msim)13 12 #define KERNEL_LOAD_ADDRESS 0x80100000 14 #endif15 16 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)17 #define KERNEL_LOAD_ADDRESS 0x8020000018 #endif19 13 20 14 OUTPUT_ARCH(mips) -
kernel/arch/mips32/include/arch/arch.h
r119b46e rfa33ac4 44 44 extern size_t cpu_count; 45 45 46 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)47 extern size_t sdram_size;48 #endif49 50 46 typedef struct { 51 47 void *addr; … … 55 51 56 52 typedef struct { 57 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)58 uint32_t sdram_size;59 #endif60 53 uint32_t cpumap; 61 54 size_t cnt; -
kernel/arch/mips32/include/arch/cp0.h
r119b46e rfa33ac4 45 45 #define cp0_status_im_shift 8 46 46 #define cp0_status_im_mask 0xff00 47 48 #define cp0_cause_ip_shift 849 #define cp0_cause_ip_mask 0xff0050 47 51 48 #define cp0_cause_excno(cause) ((cause >> 2) & 0x1f) -
kernel/arch/mips32/include/arch/mm/tlb.h
r119b46e rfa33ac4 41 41 #include <trace.h> 42 42 43 #if defined(PROCESSOR_R4000)44 43 #define TLB_ENTRY_COUNT 48 45 #define TLB_INDEX_BITS 646 #elif defined(PROCESSOR_4Kc)47 #define TLB_ENTRY_COUNT 1648 #define TLB_INDEX_BITS 449 #else50 #error Please define TLB_ENTRY_COUNT for the target processor.51 #endif52 44 53 #define TLB_WIRED 0 45 #define TLB_WIRED 1 46 #define TLB_KSTACK_WIRED_INDEX 0 54 47 55 48 #define TLB_PAGE_MASK_4K (0x000 << 13) … … 119 112 #ifdef __BE__ 120 113 unsigned p : 1; 121 unsigned : 32 - TLB_INDEX_BITS - 1;122 unsigned index : TLB_INDEX_BITS;114 unsigned : 25; 115 unsigned index : 6; 123 116 #else 124 unsigned index : TLB_INDEX_BITS;125 unsigned : 32 - TLB_INDEX_BITS - 1;117 unsigned index : 6; 118 unsigned : 25; 126 119 unsigned p : 1; 127 120 #endif -
kernel/arch/mips32/src/exception.c
r119b46e rfa33ac4 165 165 static void interrupt_exception(unsigned int n, istate_t *istate) 166 166 { 167 uint32_t ip;168 uint32_t im;169 170 167 /* Decode interrupt number and process the interrupt */ 171 ip = (cp0_cause_read() & cp0_cause_ip_mask) >> cp0_cause_ip_shift; 172 im = (cp0_status_read() & cp0_status_im_mask) >> cp0_status_im_shift; 168 uint32_t cause = (cp0_cause_read() >> 8) & 0xff; 173 169 174 170 unsigned int i; 175 171 for (i = 0; i < 8; i++) { 176 177 /* 178 * The interrupt could only occur if it is unmasked in the 179 * status register. On the other hand, an interrupt can be 180 * apparently pending even if it is masked, so we need to 181 * check both the masked and pending interrupts. 182 */ 183 if (im & ip & (1 << i)) { 172 if (cause & (1 << i)) { 184 173 irq_t *irq = irq_dispatch_and_lock(i); 185 174 if (irq) { -
kernel/arch/mips32/src/interrupt.c
r119b46e rfa33ac4 45 45 #define IRQ_COUNT 8 46 46 #define TIMER_IRQ 7 47 48 #ifdef MACHINE_msim49 47 #define DORDER_IRQ 5 50 #endif51 48 52 49 function virtual_timer_fnc = NULL; 53 50 static irq_t timer_irq; 54 55 #ifdef MACHINE_msim56 51 static irq_t dorder_irq; 57 #endif58 52 59 53 // TODO: This is SMP unsafe!!! … … 157 151 } 158 152 159 #ifdef MACHINE_msim160 153 static irq_ownership_t dorder_claim(irq_t *irq) 161 154 { … … 167 160 dorder_ipi_ack(1 << dorder_cpuid()); 168 161 } 169 #endif170 162 171 163 /* Initialize basic tables for exception dispatching */ … … 184 176 cp0_unmask_int(TIMER_IRQ); 185 177 186 #ifdef MACHINE_msim187 178 irq_initialize(&dorder_irq); 188 179 dorder_irq.devno = device_assign_devno(); … … 193 184 194 185 cp0_unmask_int(DORDER_IRQ); 195 #endif196 186 } 197 187 -
kernel/arch/mips32/src/mips32.c
r119b46e rfa33ac4 41 41 #include <memstr.h> 42 42 #include <userspace.h> 43 #include <console/console.h> 43 44 #include <syscall/syscall.h> 44 45 #include <sysinfo/sysinfo.h> 45 46 #include <arch/debug.h> 46 47 #include <arch/debugger.h> 47 #include <arch/machine_func.h> 48 #include <arch/drivers/msim.h> 49 #include <genarch/fb/fb.h> 50 #include <genarch/drivers/dsrln/dsrlnin.h> 51 #include <genarch/drivers/dsrln/dsrlnout.h> 52 #include <genarch/srln/srln.h> 48 53 49 54 /* Size of the code jumping to the exception handler code … … 65 70 66 71 size_t cpu_count = 0; 67 68 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)69 size_t sdram_size = 0;70 #endif71 72 72 73 /** Performs mips32-specific initialization before main_bsp() is called. */ … … 87 88 cpu_count++; 88 89 } 89 90 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)91 sdram_size = bootinfo->sdram_size;92 #endif93 94 /* Initialize machine_ops pointer. */95 machine_ops_init();96 90 } 97 91 … … 130 124 { 131 125 interrupt_init(); 132 133 machine_init(); 134 machine_output_init(); 126 127 #ifdef CONFIG_FB 128 /* GXemul framebuffer */ 129 fb_properties_t gxemul_prop = { 130 .addr = 0x12000000, 131 .offset = 0, 132 .x = 640, 133 .y = 480, 134 .scan = 1920, 135 .visual = VISUAL_RGB_8_8_8, 136 }; 137 138 outdev_t *fbdev = fb_init(&gxemul_prop); 139 if (fbdev) 140 stdout_wire(fbdev); 141 #endif 142 143 #ifdef CONFIG_MIPS_PRN 144 outdev_t *dsrlndev = dsrlnout_init((ioport8_t *) MSIM_KBD_ADDRESS); 145 if (dsrlndev) 146 stdout_wire(dsrlndev); 147 #endif 135 148 } 136 149 … … 145 158 void arch_post_smp_init(void) 146 159 { 160 static const char *platform; 161 147 162 /* Set platform name. */ 148 sysinfo_set_item_data("platform", NULL, 149 (void *) machine_get_platform_name(), 150 str_size(machine_get_platform_name())); 151 152 machine_input_init(); 163 #ifdef MACHINE_msim 164 platform = "msim"; 165 #endif 166 #ifdef MACHINE_bgxemul 167 platform = "gxemul"; 168 #endif 169 #ifdef MACHINE_lgxemul 170 platform = "gxemul"; 171 #endif 172 sysinfo_set_item_data("platform", NULL, (void *) platform, 173 str_size(platform)); 174 175 #ifdef CONFIG_MIPS_KBD 176 /* 177 * Initialize the msim/GXemul keyboard port. Then initialize the serial line 178 * module and connect it to the msim/GXemul keyboard. Enable keyboard interrupts. 179 */ 180 dsrlnin_instance_t *dsrlnin_instance 181 = dsrlnin_init((dsrlnin_t *) MSIM_KBD_ADDRESS, MSIM_KBD_IRQ); 182 if (dsrlnin_instance) { 183 srln_instance_t *srln_instance = srln_init(); 184 if (srln_instance) { 185 indev_t *sink = stdin_wire(); 186 indev_t *srln = srln_wire(srln_instance, sink); 187 dsrlnin_wire(dsrlnin_instance, srln); 188 cp0_unmask_int(MSIM_KBD_IRQ); 189 } 190 } 191 192 /* 193 * This is the necessary evil until the userspace driver is entirely 194 * self-sufficient. 195 */ 196 sysinfo_set_item_val("kbd", NULL, true); 197 sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ); 198 sysinfo_set_item_val("kbd.address.physical", NULL, 199 PA2KA(MSIM_KBD_ADDRESS)); 200 #endif 153 201 } 154 202 -
kernel/arch/mips32/src/mm/frame.c
r119b46e rfa33ac4 40 40 #include <mm/asid.h> 41 41 #include <config.h> 42 #ifdef MACHINE_msim43 42 #include <arch/drivers/msim.h> 44 #endif45 #include <arch/arch.h>46 43 #include <print.h> 47 44 … … 87 84 return false; 88 85 #endif 89 90 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta) 91 if (frame >= (sdram_size >> ZERO_PAGE_WIDTH)) 86 87 #if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul) 88 /* gxemul devices */ 89 if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, 90 0x10000000, MiB2SIZE(256))) 92 91 return false; 93 92 #endif … … 226 225 if (ZERO_PAGE_VALUE != 0xdeadbeef) 227 226 avail = false; 227 #if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul) 228 else { 229 ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd; 230 if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd) 231 avail = false; 232 } 233 #endif 228 234 } 229 235 } … … 241 247 /* Blacklist interrupt vector frame */ 242 248 frame_mark_unavailable(0, 1); 243 244 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)245 /* Blacklist memory regions used by YAMON.246 *247 * The YAMON User's Manual vaguely says the following physical addresses248 * are taken by YAMON:249 *250 * 0x1000 YAMON functions251 * 0x5000 YAMON code252 *253 * These addresses overlap with the beginning of the SDRAM so we need to254 * make sure they cannot be allocated.255 *256 * The User's Manual unfortunately does not say where does the SDRAM257 * portion used by YAMON end.258 *259 * Looking into the YAMON 02.21 sources, it looks like the first free260 * address is computed dynamically and depends on the size of the YAMON261 * image. From the YAMON binary, it appears to be 0xc0d50 or roughly262 * 772 KiB for that particular version.263 *264 * Linux is linked to 1MiB which seems to be a safe bet and a reasonable265 * upper bound for memory taken by YAMON. We will use it too.266 */267 frame_mark_unavailable(0, 1024 * 1024 / FRAME_SIZE);268 #endif269 249 270 250 /* Cleanup */ -
kernel/arch/mips32/src/mm/tlb.c
r119b46e rfa33ac4 48 48 #include <symtab.h> 49 49 50 #define PFN_SHIFT 12 51 #define VPN_SHIFT 12 52 #define ADDR2VPN(a) ((a) >> VPN_SHIFT) 53 #define ADDR2VPN2(a) (ADDR2VPN((a)) >> 1) 54 #define VPN2ADDR(vpn) ((vpn) << VPN_SHIFT) 55 #define VPN22ADDR(vpn2) (VPN2ADDR(vpn2) << 1) 56 #define PFN2ADDR(pfn) ((pfn) << PFN_SHIFT) 57 58 #define BANK_SELECT_BIT(a) (((a) >> PAGE_WIDTH) & 1) 59 50 static pte_t *find_mapping_and_check(uintptr_t, int, istate_t *); 60 51 61 52 /** Initialize TLB. … … 93 84 { 94 85 entry_lo_t lo; 86 entry_hi_t hi; 87 asid_t asid; 95 88 uintptr_t badvaddr; 96 uintptr_t page;97 89 pte_t *pte; 98 90 99 91 badvaddr = cp0_badvaddr_read(); 100 page = ALIGN_DOWN(badvaddr, PAGE_SIZE);101 102 pte = page_mapping_find(AS, page, true);103 if (pte && pte->p) {92 asid = AS->asid; 93 94 pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate); 95 if (pte) { 104 96 /* 105 97 * Record access to PTE. … … 107 99 pte->a = 1; 108 100 101 tlb_prepare_entry_hi(&hi, asid, badvaddr); 109 102 tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d, 110 103 pte->cacheable, pte->pfn); … … 113 106 * New entry is to be inserted into TLB 114 107 */ 115 if (BANK_SELECT_BIT(badvaddr) == 0) { 108 cp0_entry_hi_write(hi.value); 109 if ((badvaddr / PAGE_SIZE) % 2 == 0) { 116 110 cp0_entry_lo0_write(lo.value); 117 111 cp0_entry_lo1_write(0); … … 122 116 cp0_pagemask_write(TLB_PAGE_MASK_16K); 123 117 tlbwr(); 124 return; 125 } 126 127 (void) as_page_fault(page, PF_ACCESS_READ, istate); 118 } 128 119 } 129 120 … … 134 125 void tlb_invalid(istate_t *istate) 135 126 { 136 entry_lo_t lo;137 127 tlb_index_t index; 138 128 uintptr_t badvaddr; 139 uintptr_t page; 129 entry_lo_t lo; 130 entry_hi_t hi; 140 131 pte_t *pte; 132 133 badvaddr = cp0_badvaddr_read(); 141 134 142 135 /* 143 136 * Locate the faulting entry in TLB. 144 137 */ 138 hi.value = cp0_entry_hi_read(); 139 tlb_prepare_entry_hi(&hi, hi.asid, badvaddr); 140 cp0_entry_hi_write(hi.value); 145 141 tlbp(); 146 142 index.value = cp0_index_read(); 147 143 148 #if defined(PROCESSOR_4Kc)149 /*150 * This can happen on a 4Kc when Status.EXL is 1 and there is a TLB miss.151 * EXL is 1 when interrupts are disabled. The combination of a TLB miss152 * and disabled interrupts is possible in copy_to/from_uspace().153 */154 if (index.p) {155 tlb_refill(istate);156 return;157 }158 #endif159 160 144 ASSERT(!index.p); 161 145 162 badvaddr = cp0_badvaddr_read(); 163 page = ALIGN_DOWN(badvaddr, PAGE_SIZE); 164 165 pte = page_mapping_find(AS, page, true); 166 if (pte && pte->p) { 146 pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate); 147 if (pte) { 167 148 /* 168 149 * Read the faulting TLB entry. … … 181 162 * The entry is to be updated in TLB. 182 163 */ 183 if ( BANK_SELECT_BIT(badvaddr)== 0)164 if ((badvaddr / PAGE_SIZE) % 2 == 0) 184 165 cp0_entry_lo0_write(lo.value); 185 166 else 186 167 cp0_entry_lo1_write(lo.value); 168 cp0_pagemask_write(TLB_PAGE_MASK_16K); 187 169 tlbwi(); 188 return; 189 } 190 191 (void) as_page_fault(page, PF_ACCESS_READ, istate); 170 } 192 171 } 193 172 … … 198 177 void tlb_modified(istate_t *istate) 199 178 { 200 entry_lo_t lo;201 179 tlb_index_t index; 202 180 uintptr_t badvaddr; 203 uintptr_t page; 181 entry_lo_t lo; 182 entry_hi_t hi; 204 183 pte_t *pte; 205 184 206 185 badvaddr = cp0_badvaddr_read(); 207 page = ALIGN_DOWN(badvaddr, PAGE_SIZE);208 186 209 187 /* 210 188 * Locate the faulting entry in TLB. 211 189 */ 190 hi.value = cp0_entry_hi_read(); 191 tlb_prepare_entry_hi(&hi, hi.asid, badvaddr); 192 cp0_entry_hi_write(hi.value); 212 193 tlbp(); 213 194 index.value = cp0_index_read(); 214 195 215 196 /* 216 * Emit warning if the entry is not in TLB. 217 * 218 * We do not assert on this because this could be a manifestation of 219 * an emulator bug, such as QEMU Bug #1128935: 220 * https://bugs.launchpad.net/qemu/+bug/1128935 197 * Fail if the entry is not in TLB. 221 198 */ 222 if (index.p) { 223 printf("%s: TLBP failed in exception handler (badvaddr=%#" 224 PRIxn ", ASID=%d).\n", __func__, badvaddr, 225 AS ? AS->asid : -1); 226 return; 227 } 228 229 pte = page_mapping_find(AS, page, true); 230 if (pte && pte->p && pte->w) { 199 ASSERT(!index.p); 200 201 pte = find_mapping_and_check(badvaddr, PF_ACCESS_WRITE, istate); 202 if (pte) { 231 203 /* 232 204 * Read the faulting TLB entry. … … 246 218 * The entry is to be updated in TLB. 247 219 */ 248 if ( BANK_SELECT_BIT(badvaddr)== 0)220 if ((badvaddr / PAGE_SIZE) % 2 == 0) 249 221 cp0_entry_lo0_write(lo.value); 250 222 else 251 223 cp0_entry_lo1_write(lo.value); 224 cp0_pagemask_write(TLB_PAGE_MASK_16K); 252 225 tlbwi(); 253 return; 254 } 255 256 (void) as_page_fault(page, PF_ACCESS_WRITE, istate); 226 } 227 } 228 229 /** Try to find PTE for faulting address. 230 * 231 * @param badvaddr Faulting virtual address. 232 * @param access Access mode that caused the fault. 233 * @param istate Pointer to interrupted state. 234 * 235 * @return PTE on success, NULL otherwise. 236 */ 237 pte_t *find_mapping_and_check(uintptr_t badvaddr, int access, istate_t *istate) 238 { 239 entry_hi_t hi; 240 pte_t *pte; 241 242 hi.value = cp0_entry_hi_read(); 243 244 ASSERT(hi.asid == AS->asid); 245 246 /* 247 * Check if the mapping exists in page tables. 248 */ 249 pte = page_mapping_find(AS, badvaddr, true); 250 if (pte && pte->p && (pte->w || access != PF_ACCESS_WRITE)) { 251 /* 252 * Mapping found in page tables. 253 * Immediately succeed. 254 */ 255 return pte; 256 } 257 258 /* 259 * Mapping not found in page tables. 260 * Resort to higher-level page fault handler. 261 */ 262 if (as_page_fault(badvaddr, access, istate) == AS_PF_OK) { 263 pte = page_mapping_find(AS, badvaddr, true); 264 ASSERT(pte && pte->p); 265 ASSERT(pte->w || access != PF_ACCESS_WRITE); 266 return pte; 267 } 268 269 return NULL; 257 270 } 258 271 … … 271 284 void tlb_prepare_entry_hi(entry_hi_t *hi, asid_t asid, uintptr_t addr) 272 285 { 273 hi->value = 0; 274 hi->vpn2 = ADDR2VPN2(ALIGN_DOWN(addr, PAGE_SIZE)); 286 hi->value = ALIGN_DOWN(addr, PAGE_SIZE * 2); 275 287 hi->asid = asid; 276 288 } … … 279 291 void tlb_print(void) 280 292 { 281 page_mask_t mask , mask_save;282 entry_lo_t lo0, lo 0_save, lo1, lo1_save;293 page_mask_t mask; 294 entry_lo_t lo0, lo1; 283 295 entry_hi_t hi, hi_save; 284 296 unsigned int i; 285 297 286 298 hi_save.value = cp0_entry_hi_read(); 287 lo0_save.value = cp0_entry_lo0_read(); 288 lo1_save.value = cp0_entry_lo1_read(); 289 mask_save.value = cp0_pagemask_read(); 290 291 printf("[nr] [asid] [vpn2 ] [mask] [gvdc] [pfn ]\n"); 299 300 printf("[nr] [asid] [vpn2] [mask] [gvdc] [pfn ]\n"); 292 301 293 302 for (i = 0; i < TLB_ENTRY_COUNT; i++) { … … 300 309 lo1.value = cp0_entry_lo1_read(); 301 310 302 printf("%-4u %-6u % 0#10x %-#6x %1u%1u%1u%1u %0#10x\n",303 i, hi.asid, VPN22ADDR(hi.vpn2), mask.mask,304 lo0.g, lo0.v, lo0.d, lo0.c, PFN2ADDR(lo0.pfn));305 printf(" %1u%1u%1u%1u %0#10x\n",306 lo1.g, lo1.v, lo1.d, lo1.c, PFN2ADDR(lo1.pfn));311 printf("%-4u %-6u %#6x %#6x %1u%1u%1u%1u %#6x\n", 312 i, hi.asid, hi.vpn2, mask.mask, 313 lo0.g, lo0.v, lo0.d, lo0.c, lo0.pfn); 314 printf(" %1u%1u%1u%1u %#6x\n", 315 lo1.g, lo1.v, lo1.d, lo1.c, lo1.pfn); 307 316 } 308 317 309 318 cp0_entry_hi_write(hi_save.value); 310 cp0_entry_lo0_write(lo0_save.value);311 cp0_entry_lo1_write(lo1_save.value);312 cp0_pagemask_write(mask_save.value);313 319 } 314 320 … … 316 322 void tlb_invalidate_all(void) 317 323 { 324 ipl_t ipl; 318 325 entry_lo_t lo0, lo1; 319 326 entry_hi_t hi_save; 320 327 int i; 321 328 322 ASSERT(interrupts_disabled());323 324 329 hi_save.value = cp0_entry_hi_read(); 330 ipl = interrupts_disable(); 325 331 326 332 for (i = TLB_WIRED; i < TLB_ENTRY_COUNT; i++) { … … 340 346 } 341 347 348 interrupts_restore(ipl); 342 349 cp0_entry_hi_write(hi_save.value); 343 350 } … … 349 356 void tlb_invalidate_asid(asid_t asid) 350 357 { 358 ipl_t ipl; 351 359 entry_lo_t lo0, lo1; 352 360 entry_hi_t hi, hi_save; 353 361 int i; 354 362 355 ASSERT(interrupts_disabled());356 363 ASSERT(asid != ASID_INVALID); 357 364 358 365 hi_save.value = cp0_entry_hi_read(); 366 ipl = interrupts_disable(); 359 367 360 368 for (i = 0; i < TLB_ENTRY_COUNT; i++) { … … 378 386 } 379 387 388 interrupts_restore(ipl); 380 389 cp0_entry_hi_write(hi_save.value); 381 390 } … … 391 400 { 392 401 unsigned int i; 402 ipl_t ipl; 393 403 entry_lo_t lo0, lo1; 394 404 entry_hi_t hi, hi_save; 395 405 tlb_index_t index; 396 397 ASSERT(interrupts_disabled());398 406 399 407 if (asid == ASID_INVALID) … … 401 409 402 410 hi_save.value = cp0_entry_hi_read(); 411 ipl = interrupts_disable(); 403 412 404 413 for (i = 0; i < cnt + 1; i += 2) { 414 hi.value = 0; 405 415 tlb_prepare_entry_hi(&hi, asid, page + i * PAGE_SIZE); 406 416 cp0_entry_hi_write(hi.value); … … 429 439 } 430 440 441 interrupts_restore(ipl); 431 442 cp0_entry_hi_write(hi_save.value); 432 443 } -
kernel/arch/mips64/src/mips64.c
r119b46e rfa33ac4 46 46 #include <arch/debug.h> 47 47 #include <arch/debugger.h> 48 #ifdef MACHINE_msim49 48 #include <arch/drivers/msim.h> 50 #endif51 49 #include <genarch/fb/fb.h> 52 50 #include <genarch/drivers/dsrln/dsrlnin.h> … … 127 125 interrupt_init(); 128 126 129 #ifdef CONFIG_M SIM_PRN127 #ifdef CONFIG_MIPS_PRN 130 128 outdev_t *dsrlndev = dsrlnout_init((ioport8_t *) MSIM_KBD_ADDRESS); 131 129 if (dsrlndev) … … 153 151 str_size(platform)); 154 152 155 #ifdef CONFIG_MSIM_KBD 156 /* 157 * Initialize the msim keyboard port. Then initialize the serial line 158 * module and connect it to the msim keyboard. Enable keyboard 159 * interrupts. 153 #ifdef CONFIG_MIPS_KBD 154 /* 155 * Initialize the msim/GXemul keyboard port. Then initialize the serial line 156 * module and connect it to the msim/GXemul keyboard. Enable keyboard interrupts. 160 157 */ 161 158 dsrlnin_instance_t *dsrlnin_instance -
kernel/arch/mips64/src/mm/frame.c
r119b46e rfa33ac4 40 40 #include <mm/asid.h> 41 41 #include <config.h> 42 #ifdef MACHINE_msim43 42 #include <arch/drivers/msim.h> 44 #endif45 43 #include <print.h> 46 44 -
kernel/generic/include/mm/tlb.h
r119b46e rfa33ac4 73 73 extern void tlb_shootdown_ipi_recv(void); 74 74 #else 75 #define tlb_shootdown_start(w, x, y, z) interrupts_disable()76 #define tlb_shootdown_finalize(i) ( interrupts_restore(i));75 #define tlb_shootdown_start(w, x, y, z) (0) 76 #define tlb_shootdown_finalize(i) ((i) = (i)); 77 77 #define tlb_shootdown_ipi_recv() 78 78 #endif /* CONFIG_SMP */ -
release/Makefile
r119b46e rfa33ac4 33 33 34 34 PROFILES = amd64 arm32/integratorcp arm32/gta02 arm32/beagleboardxm ia32 \ 35 ia64/i460GX ia64/ski mips32/msim ppc32 sparc64/ultra 35 ia64/i460GX ia64/ski mips32/GXemul mips32/msim ppc32 \ 36 sparc64/ultra 36 37 37 38 BZR = bzr -
tools/autotool.py
r119b46e rfa33ac4 676 676 common['CC_ARGS'].append("-mabi=32") 677 677 678 if ((config['MACHINE'] == " msim") or (config['MACHINE'] == "lmalta")):678 if ((config['MACHINE'] == "lgxemul") or (config['MACHINE'] == "msim")): 679 679 target = config['PLATFORM'] 680 680 gnu_target = "mipsel-linux-gnu" 681 681 682 if ( (config['MACHINE'] == "bmalta")):682 if (config['MACHINE'] == "bgxemul"): 683 683 target = "mips32eb" 684 684 gnu_target = "mips-linux-gnu" -
uspace/Makefile
r119b46e rfa33ac4 93 93 srv/bd/sata_bd \ 94 94 srv/bd/file_bd \ 95 srv/bd/gxe_bd \ 95 96 srv/bd/rd \ 96 97 srv/bd/part/guid_part \ -
uspace/app/init/init.c
r119b46e rfa33ac4 369 369 #ifdef CONFIG_START_BD 370 370 srv_start("/srv/ata_bd"); 371 srv_start("/srv/gxe_bd"); 371 372 #endif 372 373 -
uspace/lib/c/arch/mips32/Makefile.common
r119b46e rfa33ac4 27 27 # 28 28 29 GCC_CFLAGS += -msoft-float -m abi=3229 GCC_CFLAGS += -msoft-float -mips3 -mabi=32 30 30 BASE_LIBS += $(LIBSOFTFLOAT_PREFIX)/libsoftfloat.a 31 31 … … 34 34 BFD_ARCH = mips 35 35 BFD_NAME = elf32-tradlittlemips 36 37 ifeq ($(MACHINE),msim)38 GCC_CFLAGS += -march=r400039 endif40 41 ifeq ($(MACHINE),lmalta)42 GCC_CFLAGS += -march=4kc43 endif44 -
uspace/lib/c/arch/mips32eb/Makefile.common
r119b46e rfa33ac4 27 27 # 28 28 29 GCC_CFLAGS += -msoft-float -m abi=3229 GCC_CFLAGS += -msoft-float -mips3 -mabi=32 30 30 BASE_LIBS += $(LIBSOFTFLOAT_PREFIX)/libsoftfloat.a 31 31 … … 34 34 BFD_ARCH = mips 35 35 BFD_NAME = elf32-tradbigmips 36 37 ifeq ($(MACHINE),bmalta)38 GCC_CFLAGS += -march=4kc39 endif40 -
uspace/srv/hid/input/Makefile
r119b46e rfa33ac4 39 39 port/adb_mouse.c \ 40 40 port/chardev.c \ 41 port/gxemul.c \ 41 42 port/msim.c \ 42 43 port/niagara.c \ … … 47 48 proto/mousedev.c \ 48 49 ctl/apple.c \ 50 ctl/gxe_fb.c \ 49 51 ctl/kbdev.c \ 50 52 ctl/pc.c \ -
uspace/srv/hid/input/input.c
r119b46e rfa33ac4 440 440 kbd_add_dev(&msim_port, &stty_ctl); 441 441 #endif 442 #if (defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)) && defined(CONFIG_FB) 443 kbd_add_dev(&gxemul_port, &gxe_fb_ctl); 444 #endif 445 #if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul) && !defined(CONFIG_FB) 446 kbd_add_dev(&gxemul_port, &stty_ctl); 447 #endif 442 448 #if defined(UARCH_ppc32) 443 449 kbd_add_dev(&adb_port, &apple_ctl); -
uspace/srv/hid/input/kbd_ctl.h
r119b46e rfa33ac4 49 49 50 50 extern kbd_ctl_ops_t apple_ctl; 51 extern kbd_ctl_ops_t gxe_fb_ctl; 51 52 extern kbd_ctl_ops_t kbdev_ctl; 52 53 extern kbd_ctl_ops_t pc_ctl; -
uspace/srv/hid/input/kbd_port.h
r119b46e rfa33ac4 51 51 extern kbd_port_ops_t adb_port; 52 52 extern kbd_port_ops_t chardev_port; 53 extern kbd_port_ops_t gxemul_port; 53 54 extern kbd_port_ops_t msim_port; 54 55 extern kbd_port_ops_t niagara_port;
Note:
See TracChangeset
for help on using the changeset viewer.
