Changes in uspace/drv/pciintel/pci.c [ad6857c:fb78ae72] in mainline
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uspace/drv/pciintel/pci.c
rad6857c rfb78ae72 1 1 /* 2 2 * Copyright (c) 2010 Lenka Trochtova 3 * Copyright (c) 2011 Jiri Svoboda4 3 * All rights reserved. 5 4 * … … 45 44 #include <ctype.h> 46 45 #include <macros.h> 47 #include <str_error.h> 48 49 #include <ddf/driver.h> 46 47 #include <driver.h> 50 48 #include <devman.h> 51 49 #include <ipc/devman.h> … … 67 65 ((1 << 31) | (bus << 16) | (dev << 11) | (fn << 8) | (reg & ~3)) 68 66 69 /** Obtain PCI function soft-state from DDF function node */ 70 #define PCI_FUN(fnode) ((pci_fun_t *) (fnode)->driver_data) 71 72 /** Obtain PCI bus soft-state from DDF device node */ 73 #define PCI_BUS(dnode) ((pci_bus_t *) (dnode)->driver_data) 74 75 /** Obtain PCI bus soft-state from function soft-state */ 76 #define PCI_BUS_FROM_FUN(fun) ((fun)->busptr) 77 78 static hw_resource_list_t *pciintel_get_resources(ddf_fun_t *fnode) 79 { 80 pci_fun_t *fun = PCI_FUN(fnode); 81 82 if (fun == NULL) 67 static hw_resource_list_t *pciintel_get_child_resources(device_t *dev) 68 { 69 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 70 71 if (dev_data == NULL) 83 72 return NULL; 84 return & fun->hw_resources;85 } 86 87 static bool pciintel_enable_ interrupt(ddf_fun_t *fnode)73 return &dev_data->hw_resources; 74 } 75 76 static bool pciintel_enable_child_interrupt(device_t *dev) 88 77 { 89 78 /* This is an old ugly way, copied from ne2000 driver */ 90 assert( fnode);91 pci_ fun_t *dev_data = (pci_fun_t *) fnode->driver_data;79 assert(dev); 80 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 92 81 93 82 sysarg_t apic; … … 121 110 } 122 111 123 static hw_res_ops_t pciintel_ hw_res_ops = {124 &pciintel_get_ resources,125 &pciintel_enable_ interrupt112 static hw_res_ops_t pciintel_child_hw_res_ops = { 113 &pciintel_get_child_resources, 114 &pciintel_enable_child_interrupt 126 115 }; 127 116 128 static d df_dev_ops_t pci_fun_ops;129 130 static int pci_add_device(d df_dev_t *);131 132 /** PCI bus driver standard operations*/117 static device_ops_t pci_child_ops; 118 119 static int pci_add_device(device_t *); 120 121 /** The pci bus driver's standard operations. */ 133 122 static driver_ops_t pci_ops = { 134 123 .add_device = &pci_add_device 135 124 }; 136 125 137 /** PCI bus driver structure*/126 /** The pci bus driver structure. */ 138 127 static driver_t pci_driver = { 139 128 .name = NAME, … … 141 130 }; 142 131 143 static pci_bus_t *pci_bus_new(void) 144 { 145 pci_bus_t *bus; 146 147 bus = (pci_bus_t *) calloc(1, sizeof(pci_bus_t)); 148 if (bus == NULL) 149 return NULL; 150 151 fibril_mutex_initialize(&bus->conf_mutex); 152 return bus; 153 } 154 155 static void pci_bus_delete(pci_bus_t *bus) 156 { 157 assert(bus != NULL); 158 free(bus); 159 } 160 161 static void pci_conf_read(pci_fun_t *fun, int reg, uint8_t *buf, size_t len) 162 { 163 pci_bus_t *bus = PCI_BUS_FROM_FUN(fun); 164 165 fibril_mutex_lock(&bus->conf_mutex); 132 typedef struct pciintel_bus_data { 133 uint32_t conf_io_addr; 134 void *conf_data_port; 135 void *conf_addr_port; 136 fibril_mutex_t conf_mutex; 137 } pci_bus_data_t; 138 139 static pci_bus_data_t *create_pci_bus_data(void) 140 { 141 pci_bus_data_t *bus_data; 142 143 bus_data = (pci_bus_data_t *) malloc(sizeof(pci_bus_data_t)); 144 if (bus_data != NULL) { 145 memset(bus_data, 0, sizeof(pci_bus_data_t)); 146 fibril_mutex_initialize(&bus_data->conf_mutex); 147 } 148 149 return bus_data; 150 } 151 152 static void delete_pci_bus_data(pci_bus_data_t *bus_data) 153 { 154 free(bus_data); 155 } 156 157 static void pci_conf_read(device_t *dev, int reg, uint8_t *buf, size_t len) 158 { 159 assert(dev->parent != NULL); 160 161 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 162 pci_bus_data_t *bus_data = (pci_bus_data_t *) dev->parent->driver_data; 163 164 fibril_mutex_lock(&bus_data->conf_mutex); 166 165 167 166 uint32_t conf_addr; 168 conf_addr = CONF_ADDR( fun->bus, fun->dev, fun->fn, reg);169 void *addr = bus ->conf_data_port + (reg & 3);170 171 pio_write_32(bus ->conf_addr_port, conf_addr);167 conf_addr = CONF_ADDR(dev_data->bus, dev_data->dev, dev_data->fn, reg); 168 void *addr = bus_data->conf_data_port + (reg & 3); 169 170 pio_write_32(bus_data->conf_addr_port, conf_addr); 172 171 173 172 switch (len) { … … 183 182 } 184 183 185 fibril_mutex_unlock(&bus->conf_mutex); 186 } 187 188 static void pci_conf_write(pci_fun_t *fun, int reg, uint8_t *buf, size_t len) 189 { 190 pci_bus_t *bus = PCI_BUS_FROM_FUN(fun); 191 192 fibril_mutex_lock(&bus->conf_mutex); 184 fibril_mutex_unlock(&bus_data->conf_mutex); 185 } 186 187 static void pci_conf_write(device_t *dev, int reg, uint8_t *buf, size_t len) 188 { 189 assert(dev->parent != NULL); 190 191 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 192 pci_bus_data_t *bus_data = (pci_bus_data_t *) dev->parent->driver_data; 193 194 fibril_mutex_lock(&bus_data->conf_mutex); 193 195 194 196 uint32_t conf_addr; 195 conf_addr = CONF_ADDR( fun->bus, fun->dev, fun->fn, reg);196 void *addr = bus ->conf_data_port + (reg & 3);197 198 pio_write_32(bus ->conf_addr_port, conf_addr);197 conf_addr = CONF_ADDR(dev_data->bus, dev_data->dev, dev_data->fn, reg); 198 void *addr = bus_data->conf_data_port + (reg & 3); 199 200 pio_write_32(bus_data->conf_addr_port, conf_addr); 199 201 200 202 switch (len) { … … 210 212 } 211 213 212 fibril_mutex_unlock(&bus ->conf_mutex);213 } 214 215 uint8_t pci_conf_read_8( pci_fun_t *fun, int reg)214 fibril_mutex_unlock(&bus_data->conf_mutex); 215 } 216 217 uint8_t pci_conf_read_8(device_t *dev, int reg) 216 218 { 217 219 uint8_t res; 218 pci_conf_read( fun, reg, &res, 1);220 pci_conf_read(dev, reg, &res, 1); 219 221 return res; 220 222 } 221 223 222 uint16_t pci_conf_read_16( pci_fun_t *fun, int reg)224 uint16_t pci_conf_read_16(device_t *dev, int reg) 223 225 { 224 226 uint16_t res; 225 pci_conf_read( fun, reg, (uint8_t *) &res, 2);227 pci_conf_read(dev, reg, (uint8_t *) &res, 2); 226 228 return res; 227 229 } 228 230 229 uint32_t pci_conf_read_32( pci_fun_t *fun, int reg)231 uint32_t pci_conf_read_32(device_t *dev, int reg) 230 232 { 231 233 uint32_t res; 232 pci_conf_read( fun, reg, (uint8_t *) &res, 4);234 pci_conf_read(dev, reg, (uint8_t *) &res, 4); 233 235 return res; 234 236 } 235 237 236 void pci_conf_write_8(pci_fun_t *fun, int reg, uint8_t val) 237 { 238 pci_conf_write(fun, reg, (uint8_t *) &val, 1); 239 } 240 241 void pci_conf_write_16(pci_fun_t *fun, int reg, uint16_t val) 242 { 243 pci_conf_write(fun, reg, (uint8_t *) &val, 2); 244 } 245 246 void pci_conf_write_32(pci_fun_t *fun, int reg, uint32_t val) 247 { 248 pci_conf_write(fun, reg, (uint8_t *) &val, 4); 249 } 250 251 void pci_fun_create_match_ids(pci_fun_t *fun) 252 { 238 void pci_conf_write_8(device_t *dev, int reg, uint8_t val) 239 { 240 pci_conf_write(dev, reg, (uint8_t *) &val, 1); 241 } 242 243 void pci_conf_write_16(device_t *dev, int reg, uint16_t val) 244 { 245 pci_conf_write(dev, reg, (uint8_t *) &val, 2); 246 } 247 248 void pci_conf_write_32(device_t *dev, int reg, uint32_t val) 249 { 250 pci_conf_write(dev, reg, (uint8_t *) &val, 4); 251 } 252 253 void create_pci_match_ids(device_t *dev) 254 { 255 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 256 match_id_t *match_id = NULL; 253 257 char *match_id_str; 254 int rc; 255 256 asprintf(&match_id_str, "pci/ven=%04x&dev=%04x", 257 fun->vendor_id, fun->device_id); 258 259 if (match_id_str == NULL) { 260 printf(NAME ": out of memory creating match ID.\n"); 261 return; 262 } 263 264 rc = ddf_fun_add_match_id(fun->fnode, match_id_str, 90); 265 if (rc != EOK) { 266 printf(NAME ": error adding match ID: %s\n", 267 str_error(rc)); 268 } 269 258 259 match_id = create_match_id(); 260 if (match_id != NULL) { 261 asprintf(&match_id_str, "pci/ven=%04x&dev=%04x", 262 dev_data->vendor_id, dev_data->device_id); 263 match_id->id = match_id_str; 264 match_id->score = 90; 265 add_match_id(&dev->match_ids, match_id); 266 } 267 270 268 /* TODO add more ids (with subsys ids, using class id etc.) */ 271 269 } 272 270 273 void pci_add_range(pci_fun_t *fun, uint64_t range_addr, size_t range_size, 274 bool io) 275 { 276 hw_resource_list_t *hw_res_list = &fun->hw_resources; 271 void 272 pci_add_range(device_t *dev, uint64_t range_addr, size_t range_size, bool io) 273 { 274 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 275 hw_resource_list_t *hw_res_list = &dev_data->hw_resources; 277 276 hw_resource_t *hw_resources = hw_res_list->resources; 278 277 size_t count = hw_res_list->count; … … 299 298 * address add it to the devices hw resource list. 300 299 * 301 * @param fun PCI function300 * @param dev The pci device. 302 301 * @param addr The address of the BAR in the PCI configuration address space of 303 * the device 304 * @return The addr the address of the BAR which should be read next 302 * the device. 303 * @return The addr the address of the BAR which should be read next. 305 304 */ 306 int pci_read_bar( pci_fun_t *fun, int addr)307 { 305 int pci_read_bar(device_t *dev, int addr) 306 { 308 307 /* Value of the BAR */ 309 308 uint32_t val, mask; … … 319 318 320 319 /* Get the value of the BAR. */ 321 val = pci_conf_read_32(fun, addr); 322 323 #define IO_MASK (~0x3) 324 #define MEM_MASK (~0xf) 320 val = pci_conf_read_32(dev, addr); 325 321 326 322 io = (bool) (val & 1); 327 323 if (io) { 328 324 addrw64 = false; 329 mask = IO_MASK;330 325 } else { 331 mask = MEM_MASK;332 326 switch ((val >> 1) & 3) { 333 327 case 0: … … 344 338 345 339 /* Get the address mask. */ 346 pci_conf_write_32( fun, addr, 0xffffffff);347 mask &= pci_conf_read_32(fun, addr);340 pci_conf_write_32(dev, addr, 0xffffffff); 341 mask = pci_conf_read_32(dev, addr); 348 342 349 343 /* Restore the original value. */ 350 pci_conf_write_32( fun, addr, val);351 val = pci_conf_read_32( fun, addr);344 pci_conf_write_32(dev, addr, val); 345 val = pci_conf_read_32(dev, addr); 352 346 353 347 range_size = pci_bar_mask_to_size(mask); 354 348 355 349 if (addrw64) { 356 range_addr = ((uint64_t)pci_conf_read_32( fun, addr + 4) << 32) |350 range_addr = ((uint64_t)pci_conf_read_32(dev, addr + 4) << 32) | 357 351 (val & 0xfffffff0); 358 352 } else { … … 361 355 362 356 if (range_addr != 0) { 363 printf(NAME ": function %s : ", fun->fnode->name);357 printf(NAME ": device %s : ", dev->name); 364 358 printf("address = %" PRIx64, range_addr); 365 359 printf(", size = %x\n", (unsigned int) range_size); 366 360 } 367 361 368 pci_add_range( fun, range_addr, range_size, io);362 pci_add_range(dev, range_addr, range_size, io); 369 363 370 364 if (addrw64) … … 374 368 } 375 369 376 void pci_add_interrupt(pci_fun_t *fun, int irq) 377 { 378 hw_resource_list_t *hw_res_list = &fun->hw_resources; 370 void pci_add_interrupt(device_t *dev, int irq) 371 { 372 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 373 hw_resource_list_t *hw_res_list = &dev_data->hw_resources; 379 374 hw_resource_t *hw_resources = hw_res_list->resources; 380 375 size_t count = hw_res_list->count; … … 388 383 hw_res_list->count++; 389 384 390 printf(NAME ": function %s uses irq %x.\n", fun->fnode->name, irq);391 } 392 393 void pci_read_interrupt( pci_fun_t *fun)394 { 395 uint8_t irq = pci_conf_read_8( fun, PCI_BRIDGE_INT_LINE);385 printf(NAME ": device %s uses irq %x.\n", dev->name, irq); 386 } 387 388 void pci_read_interrupt(device_t *dev) 389 { 390 uint8_t irq = pci_conf_read_8(dev, PCI_BRIDGE_INT_LINE); 396 391 if (irq != 0xff) 397 pci_add_interrupt( fun, irq);392 pci_add_interrupt(dev, irq); 398 393 } 399 394 400 395 /** Enumerate (recursively) and register the devices connected to a pci bus. 401 396 * 402 * @param bus Host-to-PCI bridge403 * @param bus_num Bus number397 * @param parent The host-to-pci bridge device. 398 * @param bus_num The bus number. 404 399 */ 405 void pci_bus_scan(pci_bus_t *bus, int bus_num) 406 { 407 ddf_fun_t *fnode; 408 pci_fun_t *fun; 400 void pci_bus_scan(device_t *parent, int bus_num) 401 { 402 device_t *dev = create_device(); 403 pci_dev_data_t *dev_data = create_pci_dev_data(); 404 dev->driver_data = dev_data; 405 dev->parent = parent; 409 406 410 407 int child_bus = 0; 411 408 int dnum, fnum; 412 409 bool multi; 413 uint8_t header_type; 414 415 fun = pci_fun_new(bus); 410 uint8_t header_type; 416 411 417 412 for (dnum = 0; dnum < 32; dnum++) { 418 413 multi = true; 419 414 for (fnum = 0; multi && fnum < 8; fnum++) { 420 pci_fun_init(fun, bus_num, dnum, fnum);421 fun->vendor_id = pci_conf_read_16(fun,415 init_pci_dev_data(dev_data, bus_num, dnum, fnum); 416 dev_data->vendor_id = pci_conf_read_16(dev, 422 417 PCI_VENDOR_ID); 423 fun->device_id = pci_conf_read_16(fun,418 dev_data->device_id = pci_conf_read_16(dev, 424 419 PCI_DEVICE_ID); 425 if ( fun->vendor_id == 0xffff) {420 if (dev_data->vendor_id == 0xffff) { 426 421 /* 427 422 * The device is not present, go on scanning the … … 434 429 } 435 430 436 header_type = pci_conf_read_8( fun, PCI_HEADER_TYPE);431 header_type = pci_conf_read_8(dev, PCI_HEADER_TYPE); 437 432 if (fnum == 0) { 438 433 /* Is the device multifunction? */ … … 442 437 header_type = header_type & 0x7F; 443 438 444 char *fun_name = pci_fun_create_name(fun); 445 if (fun_name == NULL) { 446 printf(NAME ": out of memory.\n"); 447 return; 448 } 449 450 fnode = ddf_fun_create(bus->dnode, fun_inner, fun_name); 451 if (fnode == NULL) { 452 printf(NAME ": error creating function.\n"); 453 return; 454 } 455 456 free(fun_name); 457 fun->fnode = fnode; 458 459 pci_alloc_resource_list(fun); 460 pci_read_bars(fun); 461 pci_read_interrupt(fun); 462 463 fnode->ops = &pci_fun_ops; 464 fnode->driver_data = fun; 465 466 printf(NAME ": adding new function %s.\n", 467 fnode->name); 468 469 pci_fun_create_match_ids(fun); 470 471 if (ddf_fun_bind(fnode) != EOK) { 472 pci_clean_resource_list(fun); 473 clean_match_ids(&fnode->match_ids); 474 free((char *) fnode->name); 475 fnode->name = NULL; 439 create_pci_dev_name(dev); 440 441 pci_alloc_resource_list(dev); 442 pci_read_bars(dev); 443 pci_read_interrupt(dev); 444 445 dev->ops = &pci_child_ops; 446 447 printf(NAME ": adding new child device %s.\n", 448 dev->name); 449 450 create_pci_match_ids(dev); 451 452 if (child_device_register(dev, parent) != EOK) { 453 pci_clean_resource_list(dev); 454 clean_match_ids(&dev->match_ids); 455 free((char *) dev->name); 456 dev->name = NULL; 476 457 continue; 477 458 } … … 479 460 if (header_type == PCI_HEADER_TYPE_BRIDGE || 480 461 header_type == PCI_HEADER_TYPE_CARDBUS) { 481 child_bus = pci_conf_read_8( fun,462 child_bus = pci_conf_read_8(dev, 482 463 PCI_BRIDGE_SEC_BUS_NUM); 483 464 printf(NAME ": device is pci-to-pci bridge, " 484 465 "secondary bus number = %d.\n", bus_num); 485 466 if (child_bus > bus_num) 486 pci_bus_scan( bus, child_bus);467 pci_bus_scan(parent, child_bus); 487 468 } 488 469 489 fun = pci_fun_new(bus); 470 /* Alloc new aux. dev. structure. */ 471 dev = create_device(); 472 dev_data = create_pci_dev_data(); 473 dev->driver_data = dev_data; 474 dev->parent = parent; 490 475 } 491 476 } 492 477 493 if (fun->vendor_id == 0xffff) { 494 /* Free the auxiliary function structure. */ 495 pci_fun_delete(fun); 496 } 497 } 498 499 static int pci_add_device(ddf_dev_t *dnode) 500 { 501 pci_bus_t *bus = NULL; 502 ddf_fun_t *ctl = NULL; 503 bool got_res = false; 478 if (dev_data->vendor_id == 0xffff) { 479 delete_device(dev); 480 /* Free the auxiliary device structure. */ 481 delete_pci_dev_data(dev_data); 482 } 483 } 484 485 static int pci_add_device(device_t *dev) 486 { 504 487 int rc; 505 488 506 489 printf(NAME ": pci_add_device\n"); 507 dnode->parent_phone = -1; 508 509 bus = pci_bus_new(); 510 if (bus == NULL) { 490 491 pci_bus_data_t *bus_data = create_pci_bus_data(); 492 if (bus_data == NULL) { 511 493 printf(NAME ": pci_add_device allocation failed.\n"); 512 rc = ENOMEM; 513 goto fail; 514 } 515 bus->dnode = dnode; 516 dnode->driver_data = bus; 517 518 dnode->parent_phone = devman_parent_device_connect(dnode->handle, 494 return ENOMEM; 495 } 496 497 dev->parent_phone = devman_parent_device_connect(dev->handle, 519 498 IPC_FLAG_BLOCKING); 520 if (d node->parent_phone < 0) {499 if (dev->parent_phone < 0) { 521 500 printf(NAME ": pci_add_device failed to connect to the " 522 501 "parent's driver.\n"); 523 rc = dnode->parent_phone;524 goto fail;502 delete_pci_bus_data(bus_data); 503 return dev->parent_phone; 525 504 } 526 505 527 506 hw_resource_list_t hw_resources; 528 507 529 rc = hw_res_get_resource_list(d node->parent_phone, &hw_resources);508 rc = hw_res_get_resource_list(dev->parent_phone, &hw_resources); 530 509 if (rc != EOK) { 531 510 printf(NAME ": pci_add_device failed to get hw resources for " 532 511 "the device.\n"); 533 goto fail; 534 } 535 got_res = true; 512 delete_pci_bus_data(bus_data); 513 async_hangup(dev->parent_phone); 514 return rc; 515 } 536 516 537 517 printf(NAME ": conf_addr = %" PRIx64 ".\n", … … 542 522 assert(hw_resources.resources[0].res.io_range.size == 8); 543 523 544 bus ->conf_io_addr =524 bus_data->conf_io_addr = 545 525 (uint32_t) hw_resources.resources[0].res.io_range.address; 546 526 547 if (pio_enable((void *)(uintptr_t)bus ->conf_io_addr, 8,548 &bus ->conf_addr_port)) {527 if (pio_enable((void *)(uintptr_t)bus_data->conf_io_addr, 8, 528 &bus_data->conf_addr_port)) { 549 529 printf(NAME ": failed to enable configuration ports.\n"); 550 rc = EADDRNOTAVAIL; 551 goto fail; 552 } 553 bus->conf_data_port = (char *) bus->conf_addr_port + 4; 554 555 /* Make the bus device more visible. It has no use yet. */ 556 printf(NAME ": adding a 'ctl' function\n"); 557 558 ctl = ddf_fun_create(bus->dnode, fun_exposed, "ctl"); 559 if (ctl == NULL) { 560 printf(NAME ": error creating control function.\n"); 561 rc = ENOMEM; 562 goto fail; 563 } 564 565 rc = ddf_fun_bind(ctl); 566 if (rc != EOK) { 567 printf(NAME ": error binding control function.\n"); 568 goto fail; 569 } 570 571 /* Enumerate functions. */ 530 delete_pci_bus_data(bus_data); 531 async_hangup(dev->parent_phone); 532 hw_res_clean_resource_list(&hw_resources); 533 return EADDRNOTAVAIL; 534 } 535 bus_data->conf_data_port = (char *) bus_data->conf_addr_port + 4; 536 537 dev->driver_data = bus_data; 538 539 /* Enumerate child devices. */ 572 540 printf(NAME ": scanning the bus\n"); 573 pci_bus_scan( bus, 0);541 pci_bus_scan(dev, 0); 574 542 575 543 hw_res_clean_resource_list(&hw_resources); 576 544 577 545 return EOK; 578 579 fail:580 if (bus != NULL)581 pci_bus_delete(bus);582 if (dnode->parent_phone >= 0)583 async_hangup(dnode->parent_phone);584 if (got_res)585 hw_res_clean_resource_list(&hw_resources);586 if (ctl != NULL)587 ddf_fun_destroy(ctl);588 589 return rc;590 546 } 591 547 592 548 static void pciintel_init(void) 593 549 { 594 pci_fun_ops.interfaces[HW_RES_DEV_IFACE] = &pciintel_hw_res_ops; 595 } 596 597 pci_fun_t *pci_fun_new(pci_bus_t *bus) 598 { 599 pci_fun_t *fun; 600 601 fun = (pci_fun_t *) calloc(1, sizeof(pci_fun_t)); 602 if (fun == NULL) 603 return NULL; 604 605 fun->busptr = bus; 606 return fun; 607 } 608 609 void pci_fun_init(pci_fun_t *fun, int bus, int dev, int fn) 610 { 611 fun->bus = bus; 612 fun->dev = dev; 613 fun->fn = fn; 614 } 615 616 void pci_fun_delete(pci_fun_t *fun) 617 { 618 assert(fun != NULL); 619 hw_res_clean_resource_list(&fun->hw_resources); 620 free(fun); 621 } 622 623 char *pci_fun_create_name(pci_fun_t *fun) 624 { 550 pci_child_ops.interfaces[HW_RES_DEV_IFACE] = &pciintel_child_hw_res_ops; 551 } 552 553 pci_dev_data_t *create_pci_dev_data(void) 554 { 555 pci_dev_data_t *res = (pci_dev_data_t *) malloc(sizeof(pci_dev_data_t)); 556 557 if (res != NULL) 558 memset(res, 0, sizeof(pci_dev_data_t)); 559 return res; 560 } 561 562 void init_pci_dev_data(pci_dev_data_t *dev_data, int bus, int dev, int fn) 563 { 564 dev_data->bus = bus; 565 dev_data->dev = dev; 566 dev_data->fn = fn; 567 } 568 569 void delete_pci_dev_data(pci_dev_data_t *dev_data) 570 { 571 if (dev_data != NULL) { 572 hw_res_clean_resource_list(&dev_data->hw_resources); 573 free(dev_data); 574 } 575 } 576 577 void create_pci_dev_name(device_t *dev) 578 { 579 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 625 580 char *name = NULL; 626 581 627 asprintf(&name, "%02x:%02x.%01x", fun->bus, fun->dev, 628 fun->fn); 629 return name; 630 } 631 632 bool pci_alloc_resource_list(pci_fun_t *fun) 633 { 634 fun->hw_resources.resources = 582 asprintf(&name, "%02x:%02x.%01x", dev_data->bus, dev_data->dev, 583 dev_data->fn); 584 dev->name = name; 585 } 586 587 bool pci_alloc_resource_list(device_t *dev) 588 { 589 pci_dev_data_t *dev_data = (pci_dev_data_t *)dev->driver_data; 590 591 dev_data->hw_resources.resources = 635 592 (hw_resource_t *) malloc(PCI_MAX_HW_RES * sizeof(hw_resource_t)); 636 return fun->hw_resources.resources != NULL; 637 } 638 639 void pci_clean_resource_list(pci_fun_t *fun) 640 { 641 if (fun->hw_resources.resources != NULL) { 642 free(fun->hw_resources.resources); 643 fun->hw_resources.resources = NULL; 644 } 645 } 646 647 /** Read the base address registers (BARs) of the function and add the addresses 648 * to its HW resource list. 593 return dev_data->hw_resources.resources != NULL; 594 } 595 596 void pci_clean_resource_list(device_t *dev) 597 { 598 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 599 600 if (dev_data->hw_resources.resources != NULL) { 601 free(dev_data->hw_resources.resources); 602 dev_data->hw_resources.resources = NULL; 603 } 604 } 605 606 /** Read the base address registers (BARs) of the device and adds the addresses 607 * to its hw resource list. 649 608 * 650 * @param fun PCI function609 * @param dev the pci device. 651 610 */ 652 void pci_read_bars( pci_fun_t *fun)611 void pci_read_bars(device_t *dev) 653 612 { 654 613 /* … … 659 618 660 619 while (addr <= PCI_BASE_ADDR_5) 661 addr = pci_read_bar( fun, addr);620 addr = pci_read_bar(dev, addr); 662 621 } 663 622 664 623 size_t pci_bar_mask_to_size(uint32_t mask) 665 624 { 666 size_t size = mask & ~(mask - 1); 667 return size; 625 return ((mask & 0xfffffff0) ^ 0xffffffff) + 1; 668 626 } 669 627 … … 672 630 printf(NAME ": HelenOS pci bus driver (intel method 1).\n"); 673 631 pciintel_init(); 674 return d df_driver_main(&pci_driver);632 return driver_main(&pci_driver); 675 633 } 676 634
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