Changeset feb5915 in mainline


Ignore:
Timestamp:
2005-12-29T19:17:29Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
80bff342
Parents:
7614565
Message:

sparc64 work.
Rename saving_handler() to preemptible_handler()
and fix it to make sparc64 kernel preemptive.
Add two handlers for two fatal exceptions (i.e.
instruction_access_exception and mem_address_not_aligned.
Fix panic_printf() to not allocate its own register window.

Location:
arch/sparc64
Files:
2 added
6 edited

Legend:

Unmodified
Added
Removed

  • arch/sparc64/Makefile.inc

    r7614565 rfeb5915  
    6161        arch/$(ARCH)/src/trap/trap_table.S \
    6262        arch/$(ARCH)/src/trap/trap.c \
     63        arch/$(ARCH)/src/trap/exception.c \
    6364        arch/$(ARCH)/src/trap/interrupt.c \
    6465        arch/$(ARCH)/src/drivers/tick.c

  • arch/sparc64/include/trap/interrupt.h

    r7614565 rfeb5915  
    3131 */
    3232
    33 #ifndef __sparc64_INTERRUPT_H__
    34 #define __sparc64_INTERRUPT_H__
     33#ifndef __sparc64_TRAP_INTERRUPT_H__
     34#define __sparc64_TRAP_INTERRUPT_H__
    3535
    3636#include <arch/trap/trap_table.h>
    … …  
    6060#ifdef __ASM__
    6161.macro INTERRUPT_LEVEL_N_HANDLER n
    62         save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
     62        save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
    6363        mov \n - 1, %o0
    6464        mov %fp, %o1
    65         SAVING_HANDLER exc_dispatch
     65        PREEMPTIBLE_HANDLER exc_dispatch
    6666.endm
    6767

  • arch/sparc64/include/trap/trap_table.h

    r7614565 rfeb5915  
    7272.endm
    7373
    74 .macro SAVING_HANDLER f
     74#define PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE    (STACK_WINDOW_SAVE_AREA_SIZE+(4*8))
     75#define SAVED_TSTATE    -(1*8)
     76#define SAVED_TPC       -(2*8)
     77#define SAVED_TNPC      -(3*8)
     78#define SAVED_PSTATE    -(4*8)
     79
     80.macro PREEMPTIBLE_HANDLER f
    7581        set \f, %l0
    76         b saving_handler
     82        b preemptible_handler
     83        nop
     84.endm
     85
     86.macro SIMPLE_HANDLER f
     87        call \f
    7788        nop
    7889.endm

  • arch/sparc64/src/panic.S

    r7614565 rfeb5915  
    3333.global panic_printf
    3434panic_printf:
    35         save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
    3635        call printf
    3736        nop
    … …  
    3938        nop
    4039        /* Not reached. */
    41         restore
    4240

  • arch/sparc64/src/trap/trap.c

    r7614565 rfeb5915  
    3030#include <arch/trap/trap_table.h>
    3131#include <arch/trap/regwin.h>
     32#include <arch/trap/exception.h>
    3233#include <arch/trap/interrupt.h>
    3334#include <arch/asm.h>
    … …  
    5455         * Install kernel-provided handlers.
    5556         */
     57        trap_install_handler(TT_INSTRUCTION_ACCESS_EXCEPTION, TRAP_TABLE_ENTRY_SIZE, false);
    5658        trap_install_handler(TT_CLEAN_WINDOW, CLEAN_WINDOW_HANDLER_SIZE, false);
     59        trap_install_handler(TT_MEM_ADDRESS_NOT_ALIGNED, TRAP_TABLE_ENTRY_SIZE, false);
    5760        trap_install_handler(TT_SPILL_0_NORMAL, SPILL_HANDLER_SIZE, false);
    5861        trap_install_handler(TT_FILL_0_NORMAL, FILL_HANDLER_SIZE, false);
     62        trap_install_handler(TT_INSTRUCTION_ACCESS_EXCEPTION, TRAP_TABLE_ENTRY_SIZE, true);
    5963        trap_install_handler(TT_CLEAN_WINDOW, CLEAN_WINDOW_HANDLER_SIZE, true);
     64        trap_install_handler(TT_MEM_ADDRESS_NOT_ALIGNED, TRAP_TABLE_ENTRY_SIZE, true);
    6065        trap_install_handler(TT_SPILL_0_NORMAL, SPILL_HANDLER_SIZE, true);
    6166        trap_install_handler(TT_FILL_0_NORMAL, FILL_HANDLER_SIZE, true);

  • arch/sparc64/src/trap/trap_table.S

    r7614565 rfeb5915  
    4949#include <arch/trap/regwin.h>
    5050#include <arch/trap/interrupt.h>
     51#include <arch/trap/exception.h>
     52#include <arch/stack.h>
    5153
    5254#define TABLE_SIZE      TRAP_TABLE_SIZE
    … …  
    5961.global trap_table
    6062trap_table:
     63
     64/* TT = 0x08, TL = 0, instruction_access_exception */
     65.org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE
     66.global instruction_access_exception
     67instruction_access_exception:
     68        SIMPLE_HANDLER do_instruction_access_exc
    6169
    6270/* TT = 0x24, TL = 0, clean_window handler */
    … …  
    6674        CLEAN_WINDOW_HANDLER
    6775
     76/* TT = 0x34, TL = 0, mem_address_not_aligned */
     77.org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
     78.global mem_address_not_aligned
     79mem_address_not_aligned:
     80        SIMPLE_HANDLER do_mem_address_not_aligned
     81
    6882/* TT = 0x41, TL = 0, interrupt_level_1 handler */
    6983.org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE
    … …  
    178192 */
    179193
     194/* TT = 0x08, TL > 0, instruction_access_exception */
     195.org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE
     196.global instruction_access_exception_high
     197instruction_access_exception_high:
     198        SIMPLE_HANDLER do_instruction_access_exc
     199
    180200/* TT = 0x24, TL > 0, clean_window handler */
    181201.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE
    … …  
    184204        CLEAN_WINDOW_HANDLER
    185205
     206/* TT = 0x34, TL > 0, mem_address_not_aligned */
     207.org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE
     208.global mem_address_not_aligned_high
     209mem_address_not_aligned_high:
     210        SIMPLE_HANDLER do_mem_address_not_aligned
    186211
    187212/* TT = 0x80, TL > 0, spill_0_normal handler */
    188 
    189213.org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE
    190214.global spill_0_normal_high
    191215spill_0_normal_high:
    192216        SPILL_NORMAL_HANDLER
    193 
    194217
    195218/* TT = 0xc0, TL > 0, fill_0_normal handler */
    … …  
    210233
    211234
    212 /* Trap handler that explicitly saves global registers.
     235/* Preemptible trap handler.
     236 *
     237 * This trap handler makes arrangements to
     238 * make calling scheduler() possible.
     239 *
     240 * The caller is responsible for doing save
     241 * and allocating PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE
     242 * bytes on stack.
    213243 *
    214244 * Input registers:
    … …  
    217247 *       %l1 - %l7      Copy of %g1 - %g7
    218248 */
    219 .global saving_handler
    220 saving_handler:
     249.global preemptible_handler
     250preemptible_handler:
     251        /*
     252         * Save TSTATE, TPC, TNPC and PSTATE aside.
     253         */
     254        rdpr %tstate, %g1
     255        rdpr %tpc, %g2
     256        rdpr %tnpc, %g3
     257        rdpr %pstate, %g4
     258
     259        stx %g1, [%fp + STACK_BIAS + SAVED_TSTATE]
     260        stx %g2, [%fp + STACK_BIAS + SAVED_TPC]
     261        stx %g3, [%fp + STACK_BIAS + SAVED_TNPC]
     262        stx %g4, [%fp + STACK_BIAS + SAVED_PSTATE]
     263       
     264        /*
     265         * Write 0 to TL.
     266         */
     267        wrpr %g0, 0, %tl
     268       
     269        /*
     270         * Alter PSTATE.
     271         * - switch to normal globals.
     272         */
     273        and %g4, ~1, %g4                ! mask alternate globals
     274        wrpr %g4, 0, %pstate
     275         
     276        /*
     277         * Save the normal globals.
     278         */
    221279        SAVE_GLOBALS
     280       
     281        /*
     282         * Call the higher-level handler.
     283         */
    222284        call %l0
    223285        nop
     286       
     287        /*
     288         * Restore the normal global register set.
     289         */
    224290        RESTORE_GLOBALS
    225         restore         /* matches the save instruction from the top-level handler */
     291       
     292        /*
     293         * Restore PSTATE from saved copy.
     294         * Alternate globals become active.
     295         */
     296        ldx [%fp + STACK_BIAS + SAVED_PSTATE], %l4
     297        wrpr %l4, 0, %pstate
     298       
     299        /*
     300         * Write 1 to TL.
     301         */
     302        wrpr %g0, 1, %tl
     303       
     304        /*
     305         * Read TSTATE, TPC and TNPC from saved copy.
     306         */
     307        ldx [%fp + STACK_BIAS + SAVED_TSTATE], %g1
     308        ldx [%fp + STACK_BIAS + SAVED_TPC], %g2
     309        ldx [%fp + STACK_BIAS + SAVED_TNPC], %g3
     310
     311        /*
     312         * Do restore to match the save instruction from the top-level handler.
     313         */
     314        restore
     315
     316        /*
     317         * On execution of retry instruction, CWP will be restored from TSTATE register.
     318         * However, because of scheduling, it is possible that CWP in saved TSTATE
     319         * is different from current CWP. The following chunk of code fixes CWP
     320         * in the saved copy of TSTATE.
     321         */
     322        rdpr %cwp, %g4          ! read current CWP
     323        and %g1, ~0x1f, %g1     ! clear CWP field in saved TSTATE
     324        or %g1, %g4, %g1        ! write current CWP to TSTATE
     325       
     326        /*
     327         * Restore TSTATE, TPC and TNPC from saved copies.
     328         */
     329        wrpr %g1, 0, %tstate
     330        wrpr %g2, 0, %tpc
     331        wrpr %g3, 0, %tnpc
     332         
     333        /*
     334         * Return from interrupt.
     335         */
    226336        retry
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