Changes in uspace/drv/pciintel/pci.c [af6b5157:ffa2c8ef] in mainline
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uspace/drv/pciintel/pci.c
raf6b5157 rffa2c8ef 1 1 /* 2 2 * Copyright (c) 2010 Lenka Trochtova 3 * Copyright (c) 2011 Jiri Svoboda4 3 * All rights reserved. 5 4 * … … 45 44 #include <ctype.h> 46 45 #include <macros.h> 47 #include <str_error.h> 48 49 #include <ddf/driver.h> 46 47 #include <driver.h> 50 48 #include <devman.h> 51 49 #include <ipc/devman.h> … … 63 61 ((1 << 31) | (bus << 16) | (dev << 11) | (fn << 8) | (reg & ~3)) 64 62 65 /** Obtain PCI function soft-state from DDF function node */ 66 #define PCI_FUN(fnode) ((pci_fun_t *) (fnode)->driver_data) 67 68 /** Obtain PCI bus soft-state from DDF device node */ 69 #define PCI_BUS(dnode) ((pci_bus_t *) (dnode)->driver_data) 70 71 /** Obtain PCI bus soft-state from function soft-state */ 72 #define PCI_BUS_FROM_FUN(fun) ((fun)->busptr) 73 74 static hw_resource_list_t *pciintel_get_resources(ddf_fun_t *fnode) 75 { 76 pci_fun_t *fun = PCI_FUN(fnode); 77 78 if (fun == NULL) 63 static hw_resource_list_t *pciintel_get_child_resources(device_t *dev) 64 { 65 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 66 67 if (dev_data == NULL) 79 68 return NULL; 80 return & fun->hw_resources;81 } 82 83 static bool pciintel_enable_ interrupt(ddf_fun_t *fnode)69 return &dev_data->hw_resources; 70 } 71 72 static bool pciintel_enable_child_interrupt(device_t *dev) 84 73 { 85 74 /* TODO */ … … 88 77 } 89 78 90 static hw_res_ops_t pciintel_ hw_res_ops = {91 &pciintel_get_ resources,92 &pciintel_enable_ interrupt79 static hw_res_ops_t pciintel_child_hw_res_ops = { 80 &pciintel_get_child_resources, 81 &pciintel_enable_child_interrupt 93 82 }; 94 83 95 static d df_dev_ops_t pci_fun_ops;96 97 static int pci_add_device(d df_dev_t *);98 99 /** PCI bus driver standard operations*/84 static device_ops_t pci_child_ops; 85 86 static int pci_add_device(device_t *); 87 88 /** The pci bus driver's standard operations. */ 100 89 static driver_ops_t pci_ops = { 101 90 .add_device = &pci_add_device 102 91 }; 103 92 104 /** PCI bus driver structure*/93 /** The pci bus driver structure. */ 105 94 static driver_t pci_driver = { 106 95 .name = NAME, … … 108 97 }; 109 98 110 static pci_bus_t *pci_bus_new(void) 111 { 112 pci_bus_t *bus; 113 114 bus = (pci_bus_t *) calloc(1, sizeof(pci_bus_t)); 115 if (bus == NULL) 116 return NULL; 117 118 fibril_mutex_initialize(&bus->conf_mutex); 119 return bus; 120 } 121 122 static void pci_bus_delete(pci_bus_t *bus) 123 { 124 assert(bus != NULL); 125 free(bus); 126 } 127 128 static void pci_conf_read(pci_fun_t *fun, int reg, uint8_t *buf, size_t len) 129 { 130 pci_bus_t *bus = PCI_BUS_FROM_FUN(fun); 131 132 fibril_mutex_lock(&bus->conf_mutex); 99 typedef struct pciintel_bus_data { 100 uint32_t conf_io_addr; 101 void *conf_data_port; 102 void *conf_addr_port; 103 fibril_mutex_t conf_mutex; 104 } pci_bus_data_t; 105 106 static pci_bus_data_t *create_pci_bus_data(void) 107 { 108 pci_bus_data_t *bus_data; 109 110 bus_data = (pci_bus_data_t *) malloc(sizeof(pci_bus_data_t)); 111 if (bus_data != NULL) { 112 memset(bus_data, 0, sizeof(pci_bus_data_t)); 113 fibril_mutex_initialize(&bus_data->conf_mutex); 114 } 115 116 return bus_data; 117 } 118 119 static void delete_pci_bus_data(pci_bus_data_t *bus_data) 120 { 121 free(bus_data); 122 } 123 124 static void pci_conf_read(device_t *dev, int reg, uint8_t *buf, size_t len) 125 { 126 assert(dev->parent != NULL); 127 128 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 129 pci_bus_data_t *bus_data = (pci_bus_data_t *) dev->parent->driver_data; 130 131 fibril_mutex_lock(&bus_data->conf_mutex); 133 132 134 133 uint32_t conf_addr; 135 conf_addr = CONF_ADDR( fun->bus, fun->dev, fun->fn, reg);136 void *addr = bus ->conf_data_port + (reg & 3);137 138 pio_write_32(bus ->conf_addr_port, conf_addr);134 conf_addr = CONF_ADDR(dev_data->bus, dev_data->dev, dev_data->fn, reg); 135 void *addr = bus_data->conf_data_port + (reg & 3); 136 137 pio_write_32(bus_data->conf_addr_port, conf_addr); 139 138 140 139 switch (len) { … … 150 149 } 151 150 152 fibril_mutex_unlock(&bus->conf_mutex); 153 } 154 155 static void pci_conf_write(pci_fun_t *fun, int reg, uint8_t *buf, size_t len) 156 { 157 pci_bus_t *bus = PCI_BUS_FROM_FUN(fun); 158 159 fibril_mutex_lock(&bus->conf_mutex); 151 fibril_mutex_unlock(&bus_data->conf_mutex); 152 } 153 154 static void pci_conf_write(device_t *dev, int reg, uint8_t *buf, size_t len) 155 { 156 assert(dev->parent != NULL); 157 158 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 159 pci_bus_data_t *bus_data = (pci_bus_data_t *) dev->parent->driver_data; 160 161 fibril_mutex_lock(&bus_data->conf_mutex); 160 162 161 163 uint32_t conf_addr; 162 conf_addr = CONF_ADDR( fun->bus, fun->dev, fun->fn, reg);163 void *addr = bus ->conf_data_port + (reg & 3);164 165 pio_write_32(bus ->conf_addr_port, conf_addr);164 conf_addr = CONF_ADDR(dev_data->bus, dev_data->dev, dev_data->fn, reg); 165 void *addr = bus_data->conf_data_port + (reg & 3); 166 167 pio_write_32(bus_data->conf_addr_port, conf_addr); 166 168 167 169 switch (len) { … … 177 179 } 178 180 179 fibril_mutex_unlock(&bus ->conf_mutex);180 } 181 182 uint8_t pci_conf_read_8( pci_fun_t *fun, int reg)181 fibril_mutex_unlock(&bus_data->conf_mutex); 182 } 183 184 uint8_t pci_conf_read_8(device_t *dev, int reg) 183 185 { 184 186 uint8_t res; 185 pci_conf_read( fun, reg, &res, 1);187 pci_conf_read(dev, reg, &res, 1); 186 188 return res; 187 189 } 188 190 189 uint16_t pci_conf_read_16( pci_fun_t *fun, int reg)191 uint16_t pci_conf_read_16(device_t *dev, int reg) 190 192 { 191 193 uint16_t res; 192 pci_conf_read( fun, reg, (uint8_t *) &res, 2);194 pci_conf_read(dev, reg, (uint8_t *) &res, 2); 193 195 return res; 194 196 } 195 197 196 uint32_t pci_conf_read_32( pci_fun_t *fun, int reg)198 uint32_t pci_conf_read_32(device_t *dev, int reg) 197 199 { 198 200 uint32_t res; 199 pci_conf_read( fun, reg, (uint8_t *) &res, 4);201 pci_conf_read(dev, reg, (uint8_t *) &res, 4); 200 202 return res; 201 203 } 202 204 203 void pci_conf_write_8(pci_fun_t *fun, int reg, uint8_t val) 204 { 205 pci_conf_write(fun, reg, (uint8_t *) &val, 1); 206 } 207 208 void pci_conf_write_16(pci_fun_t *fun, int reg, uint16_t val) 209 { 210 pci_conf_write(fun, reg, (uint8_t *) &val, 2); 211 } 212 213 void pci_conf_write_32(pci_fun_t *fun, int reg, uint32_t val) 214 { 215 pci_conf_write(fun, reg, (uint8_t *) &val, 4); 216 } 217 218 void pci_fun_create_match_ids(pci_fun_t *fun) 219 { 205 void pci_conf_write_8(device_t *dev, int reg, uint8_t val) 206 { 207 pci_conf_write(dev, reg, (uint8_t *) &val, 1); 208 } 209 210 void pci_conf_write_16(device_t *dev, int reg, uint16_t val) 211 { 212 pci_conf_write(dev, reg, (uint8_t *) &val, 2); 213 } 214 215 void pci_conf_write_32(device_t *dev, int reg, uint32_t val) 216 { 217 pci_conf_write(dev, reg, (uint8_t *) &val, 4); 218 } 219 220 void create_pci_match_ids(device_t *dev) 221 { 222 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 223 match_id_t *match_id = NULL; 220 224 char *match_id_str; 221 int rc; 222 223 asprintf(&match_id_str, "pci/ven=%04x&dev=%04x", 224 fun->vendor_id, fun->device_id); 225 226 if (match_id_str == NULL) { 227 printf(NAME ": out of memory creating match ID.\n"); 228 return; 229 } 230 231 rc = ddf_fun_add_match_id(fun->fnode, match_id_str, 90); 232 if (rc != EOK) { 233 printf(NAME ": error adding match ID: %s\n", 234 str_error(rc)); 235 } 236 225 226 match_id = create_match_id(); 227 if (match_id != NULL) { 228 asprintf(&match_id_str, "pci/ven=%04x&dev=%04x", 229 dev_data->vendor_id, dev_data->device_id); 230 match_id->id = match_id_str; 231 match_id->score = 90; 232 add_match_id(&dev->match_ids, match_id); 233 } 234 237 235 /* TODO add more ids (with subsys ids, using class id etc.) */ 238 236 } 239 237 240 void pci_add_range(pci_fun_t *fun, uint64_t range_addr, size_t range_size, 241 bool io) 242 { 243 hw_resource_list_t *hw_res_list = &fun->hw_resources; 238 void 239 pci_add_range(device_t *dev, uint64_t range_addr, size_t range_size, bool io) 240 { 241 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 242 hw_resource_list_t *hw_res_list = &dev_data->hw_resources; 244 243 hw_resource_t *hw_resources = hw_res_list->resources; 245 244 size_t count = hw_res_list->count; … … 266 265 * address add it to the devices hw resource list. 267 266 * 268 * @param fun PCI function267 * @param dev The pci device. 269 268 * @param addr The address of the BAR in the PCI configuration address space of 270 * the device 271 * @return The addr the address of the BAR which should be read next 269 * the device. 270 * @return The addr the address of the BAR which should be read next. 272 271 */ 273 int pci_read_bar( pci_fun_t *fun, int addr)274 { 272 int pci_read_bar(device_t *dev, int addr) 273 { 275 274 /* Value of the BAR */ 276 275 uint32_t val, mask; … … 286 285 287 286 /* Get the value of the BAR. */ 288 val = pci_conf_read_32( fun, addr);287 val = pci_conf_read_32(dev, addr); 289 288 290 289 io = (bool) (val & 1); … … 306 305 307 306 /* Get the address mask. */ 308 pci_conf_write_32( fun, addr, 0xffffffff);309 mask = pci_conf_read_32( fun, addr);307 pci_conf_write_32(dev, addr, 0xffffffff); 308 mask = pci_conf_read_32(dev, addr); 310 309 311 310 /* Restore the original value. */ 312 pci_conf_write_32( fun, addr, val);313 val = pci_conf_read_32( fun, addr);311 pci_conf_write_32(dev, addr, val); 312 val = pci_conf_read_32(dev, addr); 314 313 315 314 range_size = pci_bar_mask_to_size(mask); 316 315 317 316 if (addrw64) { 318 range_addr = ((uint64_t)pci_conf_read_32( fun, addr + 4) << 32) |317 range_addr = ((uint64_t)pci_conf_read_32(dev, addr + 4) << 32) | 319 318 (val & 0xfffffff0); 320 319 } else { … … 323 322 324 323 if (range_addr != 0) { 325 printf(NAME ": function %s : ", fun->fnode->name);324 printf(NAME ": device %s : ", dev->name); 326 325 printf("address = %" PRIx64, range_addr); 327 326 printf(", size = %x\n", (unsigned int) range_size); 328 327 } 329 328 330 pci_add_range( fun, range_addr, range_size, io);329 pci_add_range(dev, range_addr, range_size, io); 331 330 332 331 if (addrw64) … … 336 335 } 337 336 338 void pci_add_interrupt(pci_fun_t *fun, int irq) 339 { 340 hw_resource_list_t *hw_res_list = &fun->hw_resources; 337 void pci_add_interrupt(device_t *dev, int irq) 338 { 339 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 340 hw_resource_list_t *hw_res_list = &dev_data->hw_resources; 341 341 hw_resource_t *hw_resources = hw_res_list->resources; 342 342 size_t count = hw_res_list->count; … … 350 350 hw_res_list->count++; 351 351 352 printf(NAME ": function %s uses irq %x.\n", fun->fnode->name, irq);353 } 354 355 void pci_read_interrupt( pci_fun_t *fun)356 { 357 uint8_t irq = pci_conf_read_8( fun, PCI_BRIDGE_INT_LINE);352 printf(NAME ": device %s uses irq %x.\n", dev->name, irq); 353 } 354 355 void pci_read_interrupt(device_t *dev) 356 { 357 uint8_t irq = pci_conf_read_8(dev, PCI_BRIDGE_INT_LINE); 358 358 if (irq != 0xff) 359 pci_add_interrupt( fun, irq);359 pci_add_interrupt(dev, irq); 360 360 } 361 361 362 362 /** Enumerate (recursively) and register the devices connected to a pci bus. 363 363 * 364 * @param bus Host-to-PCI bridge365 * @param bus_num Bus number364 * @param parent The host-to-pci bridge device. 365 * @param bus_num The bus number. 366 366 */ 367 void pci_bus_scan(pci_bus_t *bus, int bus_num) 368 { 369 ddf_fun_t *fnode; 370 pci_fun_t *fun; 367 void pci_bus_scan(device_t *parent, int bus_num) 368 { 369 device_t *dev = create_device(); 370 pci_dev_data_t *dev_data = create_pci_dev_data(); 371 dev->driver_data = dev_data; 372 dev->parent = parent; 371 373 372 374 int child_bus = 0; 373 375 int dnum, fnum; 374 376 bool multi; 375 uint8_t header_type; 376 377 fun = pci_fun_new(bus); 377 uint8_t header_type; 378 378 379 379 for (dnum = 0; dnum < 32; dnum++) { 380 380 multi = true; 381 381 for (fnum = 0; multi && fnum < 8; fnum++) { 382 pci_fun_init(fun, bus_num, dnum, fnum);383 fun->vendor_id = pci_conf_read_16(fun,382 init_pci_dev_data(dev_data, bus_num, dnum, fnum); 383 dev_data->vendor_id = pci_conf_read_16(dev, 384 384 PCI_VENDOR_ID); 385 fun->device_id = pci_conf_read_16(fun,385 dev_data->device_id = pci_conf_read_16(dev, 386 386 PCI_DEVICE_ID); 387 if ( fun->vendor_id == 0xffff) {387 if (dev_data->vendor_id == 0xffff) { 388 388 /* 389 389 * The device is not present, go on scanning the … … 396 396 } 397 397 398 header_type = pci_conf_read_8( fun, PCI_HEADER_TYPE);398 header_type = pci_conf_read_8(dev, PCI_HEADER_TYPE); 399 399 if (fnum == 0) { 400 400 /* Is the device multifunction? */ … … 404 404 header_type = header_type & 0x7F; 405 405 406 char *fun_name = pci_fun_create_name(fun); 407 if (fun_name == NULL) { 408 printf(NAME ": out of memory.\n"); 409 return; 410 } 411 412 fnode = ddf_fun_create(bus->dnode, fun_inner, fun_name); 413 if (fnode == NULL) { 414 printf(NAME ": error creating function.\n"); 415 return; 416 } 417 418 free(fun_name); 419 fun->fnode = fnode; 420 421 pci_alloc_resource_list(fun); 422 pci_read_bars(fun); 423 pci_read_interrupt(fun); 424 425 fnode->ops = &pci_fun_ops; 426 fnode->driver_data = fun; 427 428 printf(NAME ": adding new function %s.\n", 429 fnode->name); 430 431 pci_fun_create_match_ids(fun); 432 433 if (ddf_fun_bind(fnode) != EOK) { 434 pci_clean_resource_list(fun); 435 clean_match_ids(&fnode->match_ids); 436 free((char *) fnode->name); 437 fnode->name = NULL; 406 create_pci_dev_name(dev); 407 408 pci_alloc_resource_list(dev); 409 pci_read_bars(dev); 410 pci_read_interrupt(dev); 411 412 dev->ops = &pci_child_ops; 413 414 printf(NAME ": adding new child device %s.\n", 415 dev->name); 416 417 create_pci_match_ids(dev); 418 419 if (child_device_register(dev, parent) != EOK) { 420 pci_clean_resource_list(dev); 421 clean_match_ids(&dev->match_ids); 422 free((char *) dev->name); 423 dev->name = NULL; 438 424 continue; 439 425 } … … 441 427 if (header_type == PCI_HEADER_TYPE_BRIDGE || 442 428 header_type == PCI_HEADER_TYPE_CARDBUS) { 443 child_bus = pci_conf_read_8( fun,429 child_bus = pci_conf_read_8(dev, 444 430 PCI_BRIDGE_SEC_BUS_NUM); 445 431 printf(NAME ": device is pci-to-pci bridge, " 446 432 "secondary bus number = %d.\n", bus_num); 447 433 if (child_bus > bus_num) 448 pci_bus_scan( bus, child_bus);434 pci_bus_scan(parent, child_bus); 449 435 } 450 436 451 fun = pci_fun_new(bus); 437 /* Alloc new aux. dev. structure. */ 438 dev = create_device(); 439 dev_data = create_pci_dev_data(); 440 dev->driver_data = dev_data; 441 dev->parent = parent; 452 442 } 453 443 } 454 444 455 if (fun->vendor_id == 0xffff) { 456 /* Free the auxiliary function structure. */ 457 pci_fun_delete(fun); 458 } 459 } 460 461 static int pci_add_device(ddf_dev_t *dnode) 462 { 463 pci_bus_t *bus = NULL; 464 ddf_fun_t *ctl = NULL; 465 bool got_res = false; 445 if (dev_data->vendor_id == 0xffff) { 446 delete_device(dev); 447 /* Free the auxiliary device structure. */ 448 delete_pci_dev_data(dev_data); 449 } 450 } 451 452 static int pci_add_device(device_t *dev) 453 { 466 454 int rc; 467 455 468 456 printf(NAME ": pci_add_device\n"); 469 dnode->parent_phone = -1; 470 471 bus = pci_bus_new(); 472 if (bus == NULL) { 457 458 pci_bus_data_t *bus_data = create_pci_bus_data(); 459 if (bus_data == NULL) { 473 460 printf(NAME ": pci_add_device allocation failed.\n"); 474 rc = ENOMEM; 475 goto fail; 476 } 477 bus->dnode = dnode; 478 dnode->driver_data = bus; 479 480 dnode->parent_phone = devman_parent_device_connect(dnode->handle, 461 return ENOMEM; 462 } 463 464 dev->parent_phone = devman_parent_device_connect(dev->handle, 481 465 IPC_FLAG_BLOCKING); 482 if (d node->parent_phone < 0) {466 if (dev->parent_phone < 0) { 483 467 printf(NAME ": pci_add_device failed to connect to the " 484 468 "parent's driver.\n"); 485 rc = dnode->parent_phone;486 goto fail;469 delete_pci_bus_data(bus_data); 470 return dev->parent_phone; 487 471 } 488 472 489 473 hw_resource_list_t hw_resources; 490 474 491 rc = hw_res_get_resource_list(d node->parent_phone, &hw_resources);475 rc = hw_res_get_resource_list(dev->parent_phone, &hw_resources); 492 476 if (rc != EOK) { 493 477 printf(NAME ": pci_add_device failed to get hw resources for " 494 478 "the device.\n"); 495 goto fail; 496 } 497 got_res = true; 479 delete_pci_bus_data(bus_data); 480 async_hangup(dev->parent_phone); 481 return rc; 482 } 498 483 499 484 printf(NAME ": conf_addr = %" PRIx64 ".\n", … … 504 489 assert(hw_resources.resources[0].res.io_range.size == 8); 505 490 506 bus ->conf_io_addr =491 bus_data->conf_io_addr = 507 492 (uint32_t) hw_resources.resources[0].res.io_range.address; 508 493 509 if (pio_enable((void *)(uintptr_t)bus ->conf_io_addr, 8,510 &bus ->conf_addr_port)) {494 if (pio_enable((void *)(uintptr_t)bus_data->conf_io_addr, 8, 495 &bus_data->conf_addr_port)) { 511 496 printf(NAME ": failed to enable configuration ports.\n"); 512 rc = EADDRNOTAVAIL; 513 goto fail; 514 } 515 bus->conf_data_port = (char *) bus->conf_addr_port + 4; 516 517 /* Make the bus device more visible. It has no use yet. */ 518 printf(NAME ": adding a 'ctl' function\n"); 519 520 ctl = ddf_fun_create(bus->dnode, fun_exposed, "ctl"); 521 if (ctl == NULL) { 522 printf(NAME ": error creating control function.\n"); 523 rc = ENOMEM; 524 goto fail; 525 } 526 527 rc = ddf_fun_bind(ctl); 528 if (rc != EOK) { 529 printf(NAME ": error binding control function.\n"); 530 goto fail; 531 } 532 533 /* Enumerate functions. */ 497 delete_pci_bus_data(bus_data); 498 async_hangup(dev->parent_phone); 499 hw_res_clean_resource_list(&hw_resources); 500 return EADDRNOTAVAIL; 501 } 502 bus_data->conf_data_port = (char *) bus_data->conf_addr_port + 4; 503 504 dev->driver_data = bus_data; 505 506 /* Enumerate child devices. */ 534 507 printf(NAME ": scanning the bus\n"); 535 pci_bus_scan( bus, 0);508 pci_bus_scan(dev, 0); 536 509 537 510 hw_res_clean_resource_list(&hw_resources); 538 511 539 512 return EOK; 540 541 fail:542 if (bus != NULL)543 pci_bus_delete(bus);544 if (dnode->parent_phone >= 0)545 async_hangup(dnode->parent_phone);546 if (got_res)547 hw_res_clean_resource_list(&hw_resources);548 if (ctl != NULL)549 ddf_fun_destroy(ctl);550 551 return rc;552 513 } 553 514 554 515 static void pciintel_init(void) 555 516 { 556 pci_fun_ops.interfaces[HW_RES_DEV_IFACE] = &pciintel_hw_res_ops; 557 } 558 559 pci_fun_t *pci_fun_new(pci_bus_t *bus) 560 { 561 pci_fun_t *fun; 562 563 fun = (pci_fun_t *) calloc(1, sizeof(pci_fun_t)); 564 if (fun == NULL) 565 return NULL; 566 567 fun->busptr = bus; 568 return fun; 569 } 570 571 void pci_fun_init(pci_fun_t *fun, int bus, int dev, int fn) 572 { 573 fun->bus = bus; 574 fun->dev = dev; 575 fun->fn = fn; 576 } 577 578 void pci_fun_delete(pci_fun_t *fun) 579 { 580 assert(fun != NULL); 581 hw_res_clean_resource_list(&fun->hw_resources); 582 free(fun); 583 } 584 585 char *pci_fun_create_name(pci_fun_t *fun) 586 { 517 pci_child_ops.interfaces[HW_RES_DEV_IFACE] = &pciintel_child_hw_res_ops; 518 } 519 520 pci_dev_data_t *create_pci_dev_data(void) 521 { 522 pci_dev_data_t *res = (pci_dev_data_t *) malloc(sizeof(pci_dev_data_t)); 523 524 if (res != NULL) 525 memset(res, 0, sizeof(pci_dev_data_t)); 526 return res; 527 } 528 529 void init_pci_dev_data(pci_dev_data_t *dev_data, int bus, int dev, int fn) 530 { 531 dev_data->bus = bus; 532 dev_data->dev = dev; 533 dev_data->fn = fn; 534 } 535 536 void delete_pci_dev_data(pci_dev_data_t *dev_data) 537 { 538 if (dev_data != NULL) { 539 hw_res_clean_resource_list(&dev_data->hw_resources); 540 free(dev_data); 541 } 542 } 543 544 void create_pci_dev_name(device_t *dev) 545 { 546 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 587 547 char *name = NULL; 588 548 589 asprintf(&name, "%02x:%02x.%01x", fun->bus, fun->dev, 590 fun->fn); 591 return name; 592 } 593 594 bool pci_alloc_resource_list(pci_fun_t *fun) 595 { 596 fun->hw_resources.resources = 549 asprintf(&name, "%02x:%02x.%01x", dev_data->bus, dev_data->dev, 550 dev_data->fn); 551 dev->name = name; 552 } 553 554 bool pci_alloc_resource_list(device_t *dev) 555 { 556 pci_dev_data_t *dev_data = (pci_dev_data_t *)dev->driver_data; 557 558 dev_data->hw_resources.resources = 597 559 (hw_resource_t *) malloc(PCI_MAX_HW_RES * sizeof(hw_resource_t)); 598 return fun->hw_resources.resources != NULL; 599 } 600 601 void pci_clean_resource_list(pci_fun_t *fun) 602 { 603 if (fun->hw_resources.resources != NULL) { 604 free(fun->hw_resources.resources); 605 fun->hw_resources.resources = NULL; 606 } 607 } 608 609 /** Read the base address registers (BARs) of the function and add the addresses 610 * to its HW resource list. 560 return dev_data->hw_resources.resources != NULL; 561 } 562 563 void pci_clean_resource_list(device_t *dev) 564 { 565 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 566 567 if (dev_data->hw_resources.resources != NULL) { 568 free(dev_data->hw_resources.resources); 569 dev_data->hw_resources.resources = NULL; 570 } 571 } 572 573 /** Read the base address registers (BARs) of the device and adds the addresses 574 * to its hw resource list. 611 575 * 612 * @param fun PCI function576 * @param dev the pci device. 613 577 */ 614 void pci_read_bars( pci_fun_t *fun)578 void pci_read_bars(device_t *dev) 615 579 { 616 580 /* … … 621 585 622 586 while (addr <= PCI_BASE_ADDR_5) 623 addr = pci_read_bar( fun, addr);587 addr = pci_read_bar(dev, addr); 624 588 } 625 589 … … 633 597 printf(NAME ": HelenOS pci bus driver (intel method 1).\n"); 634 598 pciintel_init(); 635 return d df_driver_main(&pci_driver);599 return driver_main(&pci_driver); 636 600 } 637 601
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