Changeset ffe276f in mainline
- Timestamp:
- 2010-05-22T22:56:00Z (15 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- c555155
- Parents:
- 86a3f89b
- Location:
- kernel/arch/ppc32
- Files:
-
- 1 deleted
- 8 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ppc32/include/asm.h
r86a3f89b rffe276f 60 60 } 61 61 62 static inline uint32_t msr_read(void) 63 { 64 uint32_t msr; 65 66 asm volatile ( 67 "mfmsr %[msr]\n" 68 : [msr] "=r" (msr) 69 ); 70 71 return msr; 72 } 73 74 static inline void msr_write(uint32_t msr) 75 { 76 asm volatile ( 77 "mtmsr %[msr]\n" 78 :: [msr] "r" (msr) 79 ); 80 } 81 62 82 /** Enable interrupts. 63 83 * -
kernel/arch/ppc32/include/asm/regname.h
r86a3f89b rffe276f 217 217 #define hid0 1008 218 218 219 /* MSR bits */220 #define msr_dr (1 << 4)221 #define msr_ir (1 << 5)222 #define msr_pr (1 << 14)223 #define msr_ee (1 << 15)224 225 /* HID0 bits */226 #define hid0_sten (1 << 24)227 #define hid0_ice (1 << 15)228 #define hid0_dce (1 << 14)229 #define hid0_icfi (1 << 11)230 #define hid0_dci (1 << 10)231 232 219 #endif 233 220 -
kernel/arch/ppc32/include/drivers/pic.h
r86a3f89b rffe276f 39 39 #include <ddi/irq.h> 40 40 41 #define PIC_PENDING_LOW 42 #define PIC_PENDING_HIGH 43 #define PIC_MASK_LOW 44 #define PIC_MASK_HIGH 45 #define PIC_ACK_LOW 46 #define PIC_ACK_HIGH 41 #define PIC_PENDING_LOW 8 42 #define PIC_PENDING_HIGH 4 43 #define PIC_MASK_LOW 9 44 #define PIC_MASK_HIGH 5 45 #define PIC_ACK_LOW 10 46 #define PIC_ACK_HIGH 6 47 47 48 extern void pic_init(uintptr_t base, size_t size, cir_t *cir, void **cir_arg);49 extern void pic_enable_interrupt(inr_t intnum);50 extern void pic_disable_interrupt(inr_t intnum);51 extern void pic_ack_interrupt(void * arg, inr_t intnum);52 extern int pic_get_pending(void);48 extern void pic_init(uintptr_t, size_t, cir_t *, void **); 49 extern void pic_enable_interrupt(inr_t); 50 extern void pic_disable_interrupt(inr_t); 51 extern void pic_ack_interrupt(void *, inr_t); 52 extern uint8_t pic_get_pending(void); 53 53 54 54 #endif -
kernel/arch/ppc32/include/exception.h
r86a3f89b rffe276f 27 27 */ 28 28 29 /** @addtogroup ppc32 29 /** @addtogroup ppc32 30 30 * @{ 31 31 */ … … 37 37 38 38 #include <typedefs.h> 39 #include <arch/ regutils.h>39 #include <arch/cpu.h> 40 40 41 41 typedef struct istate { … … 86 86 } 87 87 88 /** Return true if exception happened while in userspace */ 88 /** Return true if exception happened while in userspace 89 * 90 * The contexts of MSR register was stored in SRR1. 91 * 92 */ 89 93 static inline int istate_from_uspace(istate_t *istate) 90 94 { 91 /* true if privilege level PR (copied from MSR) == 1 */92 95 return (istate->srr1 & MSR_PR) != 0; 93 96 } -
kernel/arch/ppc32/src/asm.S
r86a3f89b rffe276f 28 28 29 29 #include <arch/asm/regname.h> 30 #include <arch/cpu.h> 30 31 31 32 .text … … 43 44 44 45 userspace_asm: 45 46 46 47 # r3 = uspace_uarg 47 48 # r4 = stack … … 49 50 50 51 # disable interrupts 51 52 52 53 mfmsr r31 53 54 rlwinm r31, r31, 0, 17, 15 … … 60 61 # set problem state, enable interrupts 61 62 62 ori r31, r31, msr_pr63 ori r31, r31, msr_ee63 ori r31, r31, MSR_PR 64 ori r31, r31, MSR_EE 64 65 mtsrr1 r31 65 66 … … 67 68 68 69 mr sp, r4 69 70 70 71 # %r6 is defined to hold pcb_ptr - set it to 0 71 72 72 73 xor r6, r6, r6 73 74 … … 141 142 142 143 # reset decrementer 143 144 144 145 li r31, 1000 145 146 mtdec r31 … … 201 202 lwz r12, 156(sp) 202 203 lwz sp, 160(sp) 203 204 204 205 rfi 205 206 … … 213 214 memcpy_from_uspace: 214 215 memcpy_to_uspace: 215 216 216 217 srwi. r7, r5, 3 217 218 addi r6, r3, -4 218 219 addi r4, r4, -4 219 beq 220 beq 2f 220 221 221 222 andi. r0, r6, 3 … … 225 226 1: 226 227 227 lwz r7, 4(r4)228 lwzu r8, 8(r4)229 stw r7, 4(r6)230 stwu r8, 8(r6)231 bdnz 1b232 233 andi. r5, r5, 7228 lwz r7, 4(r4) 229 lwzu r8, 8(r4) 230 stw r7, 4(r6) 231 stwu r8, 8(r6) 232 bdnz 1b 233 234 andi. r5, r5, 7 234 235 235 236 2: 236 237 237 cmplwi 0, r5, 4238 blt 3f239 240 lwzu r0, 4(r4)241 addi r5, r5, -4242 stwu r0, 4(r6)238 cmplwi 0, r5, 4 239 blt 3f 240 241 lwzu r0, 4(r4) 242 addi r5, r5, -4 243 stwu r0, 4(r6) 243 244 244 245 3: 245 246 246 cmpwi 0, r5, 0247 beqlr248 mtctr r5249 addi r4, r4, 3250 addi r6, r6, 3247 cmpwi 0, r5, 0 248 beqlr 249 mtctr r5 250 addi r4, r4, 3 251 addi r6, r6, 3 251 252 252 253 4: 253 254 254 lbzu r0, 1(r4)255 stbu r0, 1(r6)256 bdnz 4b257 blr255 lbzu r0, 1(r4) 256 stbu r0, 1(r6) 257 bdnz 4b 258 blr 258 259 259 260 5: 260 261 261 subfic r0, r0, 4262 mtctr r0262 subfic r0, r0, 4 263 mtctr r0 263 264 264 265 6: 265 266 266 lbz r7, 4(r4)267 addi r4, r4, 1268 stb r7, 4(r6)269 addi r6, r6, 1270 bdnz 6b271 subf r5, r0, r5272 rlwinm. r7, r5, 32-3, 3, 31273 beq 2b274 mtctr r7275 b 1b267 lbz r7, 4(r4) 268 addi r4, r4, 1 269 stb r7, 4(r6) 270 addi r6, r6, 1 271 bdnz 6b 272 subf r5, r0, r5 273 rlwinm. r7, r5, 32-3, 3, 31 274 beq 2b 275 mtctr r7 276 b 1b 276 277 277 278 memcpy_from_uspace_failover_address: -
kernel/arch/ppc32/src/drivers/pic.c
r86a3f89b rffe276f 32 32 /** @file 33 33 */ 34 35 34 36 35 #include <arch/drivers/pic.h> … … 79 78 } 80 79 81 /** Return number of pending interrupt */ 82 int pic_get_pending(void) 80 /** Return number of pending interrupts 81 * 82 */ 83 uint8_t pic_get_pending(void) 83 84 { 84 85 if (pic) { 85 int pending;86 uint32_t pending; 86 87 87 88 pending = pic[PIC_PENDING_LOW]; 88 if (pending )89 if (pending != 0) 89 90 return fnzb32(pending); 90 91 91 92 pending = pic[PIC_PENDING_HIGH]; 92 if (pending )93 if (pending != 0) 93 94 return fnzb32(pending) + 32; 94 95 } 95 96 96 return -1;97 return 255; 97 98 } 98 99 -
kernel/arch/ppc32/src/exception.S
r86a3f89b rffe276f 28 28 29 29 #include <arch/asm/regname.h> 30 #include <arch/cpu.h> 30 31 #include <arch/mm/page.h> 31 32 … … 34 35 .macro CONTEXT_STORE 35 36 36 # save R12 in SPRG1, backup CR in R1237 # save r12 in SPRG1, backup CR in r12 37 38 # save SP in SPRG2 38 39 39 40 mtsprg1 r12 40 41 mfcr r12 … … 288 289 289 290 mfmsr r12 290 ori r12, r12, ( msr_ir | msr_dr)@l291 ori r12, r12, (MSR_IR | MSR_DR)@l 291 292 mtsrr1 r12 292 293 … … 307 308 308 309 mfmsr r12 309 ori r12, r12, ( msr_ir | msr_dr)@l310 ori r12, r12, (MSR_IR | MSR_DR)@l 310 311 mtsrr1 r12 311 312 -
kernel/arch/ppc32/src/interrupt.c
r86a3f89b rffe276f 44 44 #include <print.h> 45 45 46 47 46 void start_decrementer(void) 48 47 { 49 48 asm volatile ( 50 "mtdec %0\n" 51 : 52 : "r" (1000) 49 "mtdec %[dec]\n" 50 :: [dec] "r" (1000) 53 51 ); 54 52 } 55 53 56 57 /** Handler of external interrupts */ 54 /** External interrupts handler 55 * 56 */ 58 57 static void exception_external(int n, istate_t *istate) 59 58 { 60 int inum;59 uint8_t inum; 61 60 62 while ((inum = pic_get_pending()) != -1) {61 while ((inum = pic_get_pending()) != 255) { 63 62 irq_t *irq = irq_dispatch_and_lock(inum); 64 63 if (irq) { … … 80 79 } 81 80 82 spinlock_unlock(&irq->lock);81 irq_spinlock_unlock(&irq->lock, false); 83 82 } else { 84 83 /* … … 86 85 */ 87 86 #ifdef CONFIG_DEBUG 88 printf("cpu%u: spurious interrupt (inum=%d)\n", CPU->id, inum); 87 printf("cpu%" PRIs ": spurious interrupt (inum=%" PRIu8 ")\n", 88 CPU->id, inum); 89 89 #endif 90 90 } 91 91 } 92 92 } 93 94 93 95 94 static void exception_decrementer(int n, istate_t *istate) … … 98 97 clock(); 99 98 } 100 101 99 102 100 /* Initialize basic tables for exception dispatching */
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