00001 /* 00002 * Copyright (C) 2001-2004 Jakub Jermar 00003 * All rights reserved. 00004 * 00005 * Redistribution and use in source and binary forms, with or without 00006 * modification, are permitted provided that the following conditions 00007 * are met: 00008 * 00009 * - Redistributions of source code must retain the above copyright 00010 * notice, this list of conditions and the following disclaimer. 00011 * - Redistributions in binary form must reproduce the above copyright 00012 * notice, this list of conditions and the following disclaimer in the 00013 * documentation and/or other materials provided with the distribution. 00014 * - The name of the author may not be used to endorse or promote products 00015 * derived from this software without specific prior written permission. 00016 * 00017 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 00018 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 00019 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 00020 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 00021 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 00022 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 00023 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 00024 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 00025 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 00026 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00027 */ 00028 00035 #ifndef __APIC_H__ 00036 #define __APIC_H__ 00037 00038 #include <arch/types.h> 00039 #include <cpu.h> 00040 00041 #define FIXED (0<<0) 00042 #define LOPRI (1<<0) 00043 00044 #define APIC_ID_COUNT 16 00045 00046 /* local APIC macros */ 00047 #define IPI_INIT 0 00048 #define IPI_STARTUP 0 00049 00051 #define DELMOD_FIXED 0x0 00052 #define DELMOD_LOWPRI 0x1 00053 #define DELMOD_SMI 0x2 00054 /* 0x3 reserved */ 00055 #define DELMOD_NMI 0x4 00056 #define DELMOD_INIT 0x5 00057 #define DELMOD_STARTUP 0x6 00058 #define DELMOD_EXTINT 0x7 00059 00061 #define DESTMOD_PHYS 0x0 00062 #define DESTMOD_LOGIC 0x1 00063 00065 #define TRIGMOD_EDGE 0x0 00066 #define TRIGMOD_LEVEL 0x1 00067 00069 #define LEVEL_DEASSERT 0x0 00070 #define LEVEL_ASSERT 0x1 00071 00073 #define SHORTHAND_NONE 0x0 00074 #define SHORTHAND_SELF 0x1 00075 #define SHORTHAND_ALL_INCL 0x2 00076 #define SHORTHAND_ALL_EXCL 0x3 00077 00079 #define POLARITY_HIGH 0x0 00080 #define POLARITY_LOW 0x1 00081 00083 #define DIVIDE_2 0x0 00084 #define DIVIDE_4 0x1 00085 #define DIVIDE_8 0x2 00086 #define DIVIDE_16 0x3 00087 #define DIVIDE_32 0x8 00088 #define DIVIDE_64 0x9 00089 #define DIVIDE_128 0xa 00090 #define DIVIDE_1 0xb 00091 00093 #define TIMER_ONESHOT 0x0 00094 #define TIMER_PERIODIC 0x1 00095 00097 #define DELIVS_IDLE 0x0 00098 #define DELIVS_PENDING 0x1 00099 00101 #define DEST_ALL 0xff 00102 00104 #define MODEL_FLAT 0xf 00105 #define MODEL_CLUSTER 0x0 00106 00108 #define ICRlo (0x300/sizeof(__u32)) 00109 #define ICRhi (0x310/sizeof(__u32)) 00110 struct icr { 00111 union { 00112 __u32 lo; 00113 struct { 00114 __u8 vector; 00115 unsigned delmod : 3; 00116 unsigned destmod : 1; 00117 unsigned delivs : 1; 00118 unsigned : 1; 00119 unsigned level : 1; 00120 unsigned trigger_mode : 1; 00121 unsigned : 2; 00122 unsigned shorthand : 2; 00123 unsigned : 12; 00124 } __attribute__ ((packed)); 00125 }; 00126 union { 00127 __u32 hi; 00128 struct { 00129 unsigned : 24; 00130 __u8 dest; 00131 } __attribute__ ((packed)); 00132 }; 00133 } __attribute__ ((packed)); 00134 typedef struct icr icr_t; 00135 00136 /* End Of Interrupt. */ 00137 #define EOI (0x0b0/sizeof(__u32)) 00138 00140 #define ESR (0x280/sizeof(__u32)) 00141 union esr { 00142 __u32 value; 00143 __u8 err_bitmap; 00144 struct { 00145 unsigned send_checksum_error : 1; 00146 unsigned receive_checksum_error : 1; 00147 unsigned send_accept_error : 1; 00148 unsigned receive_accept_error : 1; 00149 unsigned : 1; 00150 unsigned send_illegal_vector : 1; 00151 unsigned received_illegal_vector : 1; 00152 unsigned illegal_register_address : 1; 00153 unsigned : 24; 00154 } __attribute__ ((packed)); 00155 }; 00156 typedef union esr esr_t; 00157 00158 /* Task Priority Register */ 00159 #define TPR (0x080/sizeof(__u32)) 00160 union tpr { 00161 __u32 value; 00162 struct { 00163 unsigned pri_sc : 4; 00164 unsigned pri : 4; 00165 } __attribute__ ((packed)); 00166 }; 00167 typedef union tpr tpr_t; 00168 00170 #define SVR (0x0f0/sizeof(__u32)) 00171 union svr { 00172 __u32 value; 00173 struct { 00174 __u8 vector; 00175 unsigned lapic_enabled : 1; 00176 unsigned focus_checking : 1; 00177 unsigned : 22; 00178 } __attribute__ ((packed)); 00179 }; 00180 typedef union svr svr_t; 00181 00183 #define TDCR (0x3e0/sizeof(__u32)) 00184 union tdcr { 00185 __u32 value; 00186 struct { 00187 unsigned div_value : 4; 00188 unsigned : 28; 00189 } __attribute__ ((packed)); 00190 }; 00191 typedef union tdcr tdcr_t; 00192 00193 /* Initial Count Register for Timer */ 00194 #define ICRT (0x380/sizeof(__u32)) 00195 00196 /* Current Count Register for Timer */ 00197 #define CCRT (0x390/sizeof(__u32)) 00198 00200 #define LVT_Tm (0x320/sizeof(__u32)) 00201 union lvt_tm { 00202 __u32 value; 00203 struct { 00204 __u8 vector; 00205 unsigned : 4; 00206 unsigned delivs : 1; 00207 unsigned : 3; 00208 unsigned masked : 1; 00209 unsigned mode : 1; 00210 unsigned : 14; 00211 } __attribute__ ((packed)); 00212 }; 00213 typedef union lvt_tm lvt_tm_t; 00214 00216 #define LVT_LINT0 (0x350/sizeof(__u32)) 00217 #define LVT_LINT1 (0x360/sizeof(__u32)) 00218 union lvt_lint { 00219 __u32 value; 00220 struct { 00221 __u8 vector; 00222 unsigned delmod : 3; 00223 unsigned : 1; 00224 unsigned delivs : 1; 00225 unsigned intpol : 1; 00226 unsigned irr : 1; 00227 unsigned trigger_mode : 1; 00228 unsigned masked : 1; 00229 unsigned : 15; 00230 } __attribute__ ((packed)); 00231 }; 00232 typedef union lvt_lint lvt_lint_t; 00233 00235 #define LVT_Err (0x370/sizeof(__u32)) 00236 union lvt_error { 00237 __u32 value; 00238 struct { 00239 __u8 vector; 00240 unsigned : 4; 00241 unsigned delivs : 1; 00242 unsigned : 3; 00243 unsigned masked : 1; 00244 unsigned : 15; 00245 } __attribute__ ((packed)); 00246 }; 00247 typedef union lvt_error lvt_error_t; 00248 00250 #define L_APIC_ID (0x020/sizeof(__u32)) 00251 union l_apic_id { 00252 __u32 value; 00253 struct { 00254 unsigned : 24; 00255 __u8 apic_id; 00256 } __attribute__ ((packed)); 00257 }; 00258 typedef union l_apic_id l_apic_id_t; 00259 00261 #define LAVR (0x030/sizeof(__u32)) 00262 #define LAVR_Mask 0xff 00263 #define is_local_apic(x) (((x)&LAVR_Mask&0xf0)==0x1) 00264 #define is_82489DX_apic(x) ((((x)&LAVR_Mask&0xf0)==0x0)) 00265 #define is_local_xapic(x) (((x)&LAVR_Mask)==0x14) 00266 00268 #define LDR (0x0d0/sizeof(__u32)) 00269 union ldr { 00270 __u32 value; 00271 struct { 00272 unsigned : 24; 00273 __u8 id; 00274 } __attribute__ ((packed)); 00275 }; 00276 typedef union ldr ldr_t; 00277 00279 #define DFR (0x0e0/sizeof(__u32)) 00280 union dfr { 00281 __u32 value; 00282 struct { 00283 unsigned : 28; 00284 unsigned model : 4; 00285 } __attribute__ ((packed)); 00286 }; 00287 typedef union dfr dfr_t; 00288 00289 /* IO APIC */ 00290 #define IOREGSEL (0x00/sizeof(__u32)) 00291 #define IOWIN (0x10/sizeof(__u32)) 00292 00293 #define IOAPICID 0x00 00294 #define IOAPICVER 0x01 00295 #define IOAPICARB 0x02 00296 #define IOREDTBL 0x10 00297 00299 union io_regsel { 00300 __u32 value; 00301 struct { 00302 __u8 reg_addr; 00303 unsigned : 24; 00304 } __attribute__ ((packed)); 00305 }; 00306 typedef union io_regsel io_regsel_t; 00307 00309 struct io_redirection_reg { 00310 union { 00311 __u32 lo; 00312 struct { 00313 __u8 intvec; 00314 unsigned delmod : 3; 00315 unsigned destmod : 1; 00316 unsigned delivs : 1; 00317 unsigned intpol : 1; 00318 unsigned irr : 1; 00319 unsigned trigger_mode : 1; 00320 unsigned masked : 1; 00321 unsigned : 15; 00322 } __attribute__ ((packed)); 00323 }; 00324 union { 00325 __u32 hi; 00326 struct { 00327 unsigned : 24; 00328 __u8 dest : 8; 00329 } __attribute__ ((packed)); 00330 }; 00331 00332 } __attribute__ ((packed)); 00333 typedef struct io_redirection_reg io_redirection_reg_t; 00334 00335 00337 union io_apic_id { 00338 __u32 value; 00339 struct { 00340 unsigned : 24; 00341 unsigned apic_id : 4; 00342 unsigned : 4; 00343 } __attribute__ ((packed)); 00344 }; 00345 typedef union io_apic_id io_apic_id_t; 00346 00347 extern volatile __u32 *l_apic; 00348 extern volatile __u32 *io_apic; 00349 00350 extern __u32 apic_id_mask; 00351 00352 extern void apic_init(void); 00353 00354 extern void l_apic_init(void); 00355 extern void l_apic_eoi(void); 00356 extern int l_apic_broadcast_custom_ipi(__u8 vector); 00357 extern int l_apic_send_init_ipi(__u8 apicid); 00358 extern void l_apic_debug(void); 00359 extern __u8 l_apic_id(void); 00360 00361 extern __u32 io_apic_read(__u8 address); 00362 extern void io_apic_write(__u8 address , __u32 x); 00363 extern void io_apic_change_ioredtbl(int pin, int dest, __u8 v, int flags); 00364 extern void io_apic_disable_irqs(__u16 irqmask); 00365 extern void io_apic_enable_irqs(__u16 irqmask); 00366 00367 #endif 00368
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