atomic.h

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00001 /*
00002  * Copyright (C) 2001-2004 Jakub Jermar
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  *
00009  * - Redistributions of source code must retain the above copyright
00010  *   notice, this list of conditions and the following disclaimer.
00011  * - Redistributions in binary form must reproduce the above copyright
00012  *   notice, this list of conditions and the following disclaimer in the
00013  *   documentation and/or other materials provided with the distribution.
00014  * - The name of the author may not be used to endorse or promote products
00015  *   derived from this software without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
00018  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
00019  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
00020  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
00021  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
00022  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
00023  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
00024  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
00025  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
00026  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00027  */
00028 
00035 #ifndef __ia32_ATOMIC_H__
00036 #define __ia32_ATOMIC_H__
00037 
00038 #include <arch/types.h>
00039 #include <arch/barrier.h>
00040 #include <preemption.h>
00041 #include <typedefs.h>
00042 
00043 static inline void atomic_inc(atomic_t *val) {
00044 #ifdef CONFIG_SMP
00045         __asm__ volatile ("lock incl %0\n" : "=m" (val->count));
00046 #else
00047         __asm__ volatile ("incl %0\n" : "=m" (val->count));
00048 #endif /* CONFIG_SMP */
00049 }
00050 
00051 static inline void atomic_dec(atomic_t *val) {
00052 #ifdef CONFIG_SMP
00053         __asm__ volatile ("lock decl %0\n" : "=m" (val->count));
00054 #else
00055         __asm__ volatile ("decl %0\n" : "=m" (val->count));
00056 #endif /* CONFIG_SMP */
00057 }
00058 
00059 static inline long atomic_postinc(atomic_t *val) 
00060 {
00061         long r = 1;
00062 
00063         __asm__ volatile (
00064                 "lock xaddl %1, %0\n"
00065                 : "=m" (val->count), "+r" (r)
00066         );
00067 
00068         return r;
00069 }
00070 
00071 static inline long atomic_postdec(atomic_t *val) 
00072 {
00073         long r = -1;
00074         
00075         __asm__ volatile (
00076                 "lock xaddl %1, %0\n"
00077                 : "=m" (val->count), "+r"(r)
00078         );
00079         
00080         return r;
00081 }
00082 
00083 #define atomic_preinc(val) (atomic_postinc(val)+1)
00084 #define atomic_predec(val) (atomic_postdec(val)-1)
00085 
00086 static inline __u32 test_and_set(atomic_t *val) {
00087         __u32 v;
00088         
00089         __asm__ volatile (
00090                 "movl $1, %0\n"
00091                 "xchgl %0, %1\n"
00092                 : "=r" (v),"=m" (val->count)
00093         );
00094         
00095         return v;
00096 }
00097 
00099 static inline void atomic_lock_arch(atomic_t *val)
00100 {
00101         __u32 tmp;
00102 
00103         preemption_disable();
00104         __asm__ volatile (
00105                 "0:;"
00106 #ifdef CONFIG_HT
00107                 "pause;" /* Pentium 4's HT love this instruction */
00108 #endif
00109                 "mov %0, %1;"
00110                 "testl %1, %1;"
00111                 "jnz 0b;"       /* Lightweight looping on locked spinlock */
00112                 
00113                 "incl %1;"      /* now use the atomic operation */
00114                 "xchgl %0, %1;"
00115                 "testl %1, %1;"
00116                 "jnz 0b;"
00117                 : "=m"(val->count),"=r"(tmp)
00118                 );
00119         /*
00120          * Prevent critical section code from bleeding out this way up.
00121          */
00122         CS_ENTER_BARRIER();
00123 }
00124 
00125 #endif
00126 

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