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00035 #ifndef __ia32_CPUID_H__
00036 #define __ia32_CPUID_H__
00037
00038 #include <arch/types.h>
00039
00040 struct cpu_info {
00041 __u32 cpuid_eax;
00042 __u32 cpuid_ebx;
00043 __u32 cpuid_ecx;
00044 __u32 cpuid_edx;
00045 } __attribute__ ((packed));
00046
00047 struct __cpuid_extended_feature_info {
00048 unsigned sse3 : 1;
00049 unsigned : 31;
00050 } __attribute__ ((packed));
00051
00052 typedef union cpuid_extended_feature_info
00053 {
00054 struct __cpuid_extended_feature_info bits;
00055 __u32 word;
00056 }cpuid_extended_feature_info;
00057
00058
00059 struct __cpuid_feature_info {
00060 unsigned : 23;
00061 unsigned mmx : 1;
00062 unsigned fxsr : 1;
00063 unsigned sse : 1;
00064 unsigned sse2 : 1;
00065 unsigned : 5;
00066 } __attribute__ ((packed));
00067
00068 typedef union cpuid_feature_info
00069 {
00070 struct __cpuid_feature_info bits;
00071 __u32 word ;
00072 }cpuid_feature_info;
00073
00074
00075 static inline __u32 has_cpuid(void)
00076 {
00077 __u32 val, ret;
00078
00079 __asm__ volatile (
00080 "pushf\n"
00081 "popl %0\n"
00082 "movl %0, %1\n"
00083
00084 "btcl $21, %1\n"
00085
00086 "pushl %1\n"
00087 "popf\n"
00088 "pushf\n"
00089 "popl %1\n"
00090
00091 "andl $(1 << 21), %0\n"
00092 "andl $(1 << 21), %1\n"
00093 "xorl %1, %0\n"
00094 : "=r" (ret), "=r" (val)
00095 );
00096
00097 return ret;
00098 }
00099
00100 static inline void cpuid(__u32 cmd, struct cpu_info *info)
00101 {
00102 __asm__ volatile (
00103 "movl %4, %%eax\n"
00104 "cpuid\n"
00105
00106 "movl %%eax, %0\n"
00107 "movl %%ebx, %1\n"
00108 "movl %%ecx, %2\n"
00109 "movl %%edx, %3\n"
00110 : "=m" (info->cpuid_eax), "=m" (info->cpuid_ebx), "=m" (info->cpuid_ecx), "=m" (info->cpuid_edx)
00111 : "m" (cmd)
00112 : "eax", "ebx", "ecx", "edx"
00113 );
00114 }
00115
00116 #endif
00117