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source:
mainline
/
uspace
/
drv
/
bus
/
pci
/
pciintel
/
pci.c
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Rev
Age
Author
Log Message
(edit)
@46eb2c4
11 years
jakub
Use pio_enable_resource() in pci.
lfn
serial
ticket/834-toolchain-update
topic/msim-upgrade
topic/simplify-dev-export
(edit)
@9e470c0
11 years
jakub
Add IO_RANGE and MEM_RANGE members to distinguish whether the range is …
lfn
serial
ticket/834-toolchain-update
topic/msim-upgrade
topic/simplify-dev-export
(edit)
@6dbc500
11 years
jakub
PIO_WINDOW_DEV_IFACE support for pciintel.
lfn
serial
ticket/834-toolchain-update
topic/msim-upgrade
topic/simplify-dev-export
(edit)
@65f77f4
11 years
jakub
Do not add interrupt for devices that do not use an interrupt pin.
lfn
serial
ticket/834-toolchain-update
topic/msim-upgrade
topic/simplify-dev-export
(edit)
@e8d6ce2
11 years
jakub
Do not add unimplemented ranges.
lfn
serial
ticket/834-toolchain-update
topic/msim-upgrade
topic/simplify-dev-export
(edit)
@82721f5
11 years
jakub
Use only aligned 32-bit accesses to read/write the PCI configuration …
lfn
serial
ticket/834-toolchain-update
topic/msim-upgrade
topic/simplify-dev-export
(edit)
@c90aed4
12 years
martin
explicitly enable PCI bus mastering for each PCI bus function (this …
lfn
serial
ticket/834-toolchain-update
topic/msim-upgrade
topic/simplify-dev-export
(edit)
@3e6a98c5
12 years
jiri
Standards-compliant boolean type.
lfn
serial
ticket/834-toolchain-update
topic/msim-upgrade
topic/simplify-dev-export
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