Opened 16 years ago
Closed 14 years ago
#69 closed defect (notadefect)
i8042 CPU reset fails miserably in SMP configurations
| Reported by: | Jiri Svoboda | Owned by: | |
|---|---|---|---|
| Priority: | minor | Milestone: | 0.4.3 |
| Component: | helenos/kernel/genarch | Version: | mainline |
| Keywords: | reboot i8042 | Cc: | |
| Blocker for: | Depends on: | ||
| See also: |
Description
The new method for rebooting PCs using i8042 works in uniprocessor. However, with SMP in Qemu it goes horribly wrong. Either it does not reboot at all, or it reboots and then dies in a triple fault during POST.
I believe this is because only one CPU gets reset and the others continue running happily. Whether this is a Qemu bug, or whether we are using an incorrect method of rebooting, needs to be determined.
Change History (7)
follow-up: 4 comment:1 by , 16 years ago
comment:2 by , 16 years ago
| Component: | → kernel/genarch |
|---|
comment:3 by , 16 years ago
| Milestone: | 0.4.1 → 0.5.0 |
|---|
comment:4 by , 15 years ago
Replying to decky:
I have already investigated this and it seems to be a bug in QEMU (I don't remember the details, but the reset flag gets somehow forgotten by the other CPUs — I can dig into the sources again).
With the recent versions of Qemu, it is possible to log CPU resets, so if we run qemu with the -d int,cpu_reset option, we should be able to see how the other CPUs reacted to the reset in /tmp/qemu.log.
comment:5 by , 15 years ago
I have tried. In case of two CPUs they both report to be reset, but nothing actually happens pass that point ..
comment:6 by , 15 years ago
In the case of a triple-fault on Qemu/SMP, the system is not reset either, but appears to be hard hung. What is important, IMHO, is to verify that after reseting the system via i8042, all CPUs are marked as reset by Qemu, regardless of whether the system is eventually reset or not.
I suggest closing this bug as not a defect.
comment:7 by , 14 years ago
| Resolution: | → notadefect |
|---|---|
| Status: | new → closed |
Closing this ticket as not a defect, feel free to reopen if necessary.
I have already investigated this and it seems to be a bug in QEMU (I don't remember the details, but the reset flag gets somehow forgotten by the other CPUs — I can dig into the sources again).
The i8042 reset works OK in Simics and on bare hardware in SMP configurations.
The question is what should we do about it? Fixing the bug in QEMU is certainly welcomed, but if there is a fail-safe workaround, we should implement it also.