Changeset d70ebffe in mainline for kernel/arch/sparc64/src/sun4u/start.S

Timestamp:

2014-10-27T15:10:14Z (10 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

aef669b

Parents:

ec443d5

Message:

Let the fast MMU traps use exc_dispatch() in their slow-path.

In order to get proper exception accounting, the MMU related traps need
to go through the code in exc_dispatch(). To make this possible, we pass
the DTLB Tag Access register in istate_t in order to make way for the
trap type argument, which needs to be passed as the first argument to
exc_dispatch().

As a collateral change, this commit modifies the istate_t structure to
match the SPARC V9 ABI stack frame layout. It gives us a richer istate_t
with more information in it and also simplifies calculation of stack
offsets inside of preemptible_handler.

File:

• kernel/arch/sparc64/src/sun4u/start.S (modified) (2 diffs)

kernel/arch/sparc64/src/sun4u/start.S

@@ -401 +401 @@
 
 /*
- * The fast_data_access_mmu_miss_data_hi label and the end_of_identity and
- * kernel_8k_tlb_data_template variables are meant to stay together,
- * aligned on 16B boundary.
+ * The fast_data_access_mmu_miss_data_hi label, the end_of_identity,
+ * kernel_8k_tlb_data_template and tlb_tag_access_context_mask variables
+ * are meant to stay together, aligned on a 32B boundary.
  */
 .global fast_data_access_mmu_miss_data_hi
 .global end_of_identity 
 .global kernel_8k_tlb_data_template
-
-.align 16
+.global tlb_tag_access_context_mask
+
+.align 32 
 /*
  * This label is used by the fast_data_access_MMU_miss trap handler.
@@ -435 +436 @@
 #endif /* CONFIG_VIRT_IDX_DCACHE */
 
+/*
+ * This variable is used by the fast_data_access_MMU_miss trap handler.
+ * It allows us to save one precious instruction slot of this handler.
+ */
+tlb_tag_access_context_mask:
+        .quad TLB_TAG_ACCESS_CONTEXT_MASK
+