Changeset 0259524 in mainline for arch/ia64/include/barrier.h

Timestamp:

2005-11-03T20:26:29Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

05d9dd89

Parents:

dbd1059

Message:

IA-64 work.
Add some asm functions for manipulation with PSR, AR and CR registers.

File:

• arch/ia64/include/barrier.h (modified) (1 diff)

arch/ia64/include/barrier.h

@@ -33 +33 @@
  * TODO: Implement true IA-64 memory barriers for macros below.
  */
-#define CS_ENTER_BARRIER()      __asm__ volatile ("" ::: "memory")
-#define CS_LEAVE_BARRIER()      __asm__ volatile ("" ::: "memory")
+#define CS_ENTER_BARRIER()      memory_barrier()
+#define CS_LEAVE_BARRIER()      memory_barrier()
 
-#define memory_barrier()
-#define read_barrier()
-#define write_barrier()
+#define memory_barrier()        __asm__ volatile ("mf\n" ::: "memory")
+#define read_barrier()          memory_barrier()
+#define write_barrier()         memory_barrier()
 
 #define srlz_i()                __asm__ volatile (";; srlz.i ;;\n" ::: "memory")
-#define srlz_d()                __asm__ volatile (";; srlz.d ;;\n" ::: "memory")
+#define srlz_d()                __asm__ volatile (";; srlz.d\n" ::: "memory")
 
 #endif